公开(公告)号：US20140169067A1

公开(公告)日：2014-06-19

申请号：US13971069

申请日：2013-08-20

Applicant: SK HYNIX INC.

Inventor： Hyun Mi HWANG ,  Hyung Dong LEE

IPC: H01L45/00 ,  G11C13/00

CPC classification number: G11C13/0002 ,  G11C13/0007 ,  G11C13/0069 ,  G11C23/00 ,  G11C2013/0083 ,  G11C2013/0095 ,  G11C2213/32 ,  H01L41/0986 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146

Abstract: A resistance memory device and a memory apparatus and data processing apparatus having the same are provided. The resistance memory device includes a pair of electrode layers and a variable resistance layer interposed between the pair of electrode layers. The variable resistance layer includes at least one variable resistance material layer and a piezoelectric material layer coupled to the at least one variable resistance material layer.

Abstract translation: 提供了一种电阻存储装置及具有该电阻存储装置的存储装置及数据处理装置。 电阻存储器件包括一对电极层和插在该对电极层之间的可变电阻层。 可变电阻层包括至少一个可变电阻材料层和耦合到该至少一个可变电阻材料层的压电材料层。

公开(公告)号：US20240260269A1

公开(公告)日：2024-08-01

申请号：US18361509

申请日：2023-07-28

Applicant: SK hynix Inc.

Inventor： Hyun Mi HWANG

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

Abstract: There is provided a memory device and a method of manufacturing the memory device. The memory device includes: a wafer including a chip region and an edge region surrounding the chip region; a stack structure including a plurality of insulating layers and a plurality of conductive layers, which are alternately stacked over the chip region; a plurality of channel structures disposed in the stack structure; a first slit penetrating the plurality of insulating layers and the plurality of conductive layers; an upper insulating layer disposed over the edge region; and a plurality of second slits formed in a portion of the upper insulating layer.