公开(公告)号：US20140353569A1

公开(公告)日：2014-12-04

申请号：US14024140

申请日：2013-09-11

Applicant: SK hynix Inc.

Inventor： Hyun Min LEE ,  Han Woo CHO

IPC: H01L45/00

CPC classification number: H01L27/2409 ,  H01L27/224 ,  H01L43/02 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/1683

Abstract: A variable resistance memory device and a method of manufacturing the same are provided. The variable resistance memory device includes a first insulating layer formed on a semiconductor substrate, the first insulating layer having a first hole formed therein. A switching device is formed in the first hole. A second insulating layer is formed over the first insulating layer and the second insulating layer includes a second hole. A lower electrode is formed along a surface of the second insulating layer that defines the second hole. A spacer is formed on the lower electrode and exposes a portion of the surface of the lower electrode. A variable resistance material layer is formed in the second hole, and an upper electrode is formed on the variable resistance material layer.

Abstract translation: 提供了一种可变电阻存储器件及其制造方法。 可变电阻存储器件包括形成在半导体衬底上的第一绝缘层，第一绝缘层具有形成在其中的第一孔。 开关装置形成在第一孔中。 在第一绝缘层上形成第二绝缘层，第二绝缘层包括第二孔。 沿着限定第二孔的第二绝缘层的表面形成下电极。 在下电极上形成间隔物，并露出下电极表面的一部分。 在第二孔中形成可变电阻材料层，在可变电阻材料层上形成上电极。

公开(公告)号：US20140319445A1

公开(公告)日：2014-10-30

申请号：US13975691

申请日：2013-08-26

Applicant: SK hynix Inc.

Inventor： Han Woo CHO ,  Hyo Seob YOON ,  Yong Seok LEE

IPC: H01L45/00

CPC classification number: H01L45/126 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1293 ,  H01L45/144 ,  H01L45/1691

Abstract: A resistive memory device and a fabrication method thereof are provided. The resistive memory device includes a bottom structure including a heating electrode, data storage materials, each of the data storage materials formed on the bottom structure in a confined structure perpendicular to the bottom structure, and having a lower diameter smaller than an upper diameter, an upper electrode formed on each of the data storage materials, and an insulation unit formed between adjacent data storage materials.

Abstract translation: 提供了一种电阻式存储器件及其制造方法。 电阻式存储器件包括底部结构，其包括加热电极，数据存储材料，每个数据存储材料形成在垂直于底部结构的约束结构中的底部结构上，并具有小于上部直径的较小直径， 形成在每个数据存储材料上的上电极以及形成在相邻数据存储材料之间的绝缘单元。

公开(公告)号：US20170294581A1

公开(公告)日：2017-10-12

申请号：US15634573

申请日：2017-06-27

Applicant: SK hynix Inc.

Inventor： Gyu Hyun KIM ,  Dae Won KIM ,  Byoung Ki LEE ,  Han Woo CHO

IPC: H01L45/00

CPC classification number: H01L45/1675 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/16

Abstract: A method of semiconductor device fabrication that includes sequentially forming an interfacial conductive layer and an etch stop layer on a resistive memory layer; forming a main conductive layer on the etch stop layer; exposing a portion of the etch stop layer by patterning the main conductive layer; exposing a portion of the interfacial conductive layer by patterning the portion of the etch stop layer; forming an upper electrode structure by patterning the portion of the interfacial conductive layer; cleaning a surface of the upper electrode structure and an exposed surface of the resistive memory layer; and patterning the resistive memory layer using the upper electrode structure as an etch mask.

公开(公告)号：US20160359111A1

公开(公告)日：2016-12-08

申请号：US14883216

申请日：2015-10-14

Applicant: SK hynix Inc.

Inventor： Gyu Hyun KIM ,  Dae Won KIM ,  Byoung Ki LEE ,  Han Woo CHO

IPC: H01L45/00

CPC classification number: H01L45/1675 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/16

Abstract: A method of semiconductor device fabrication that includes sequentially forming an interfacial conductive layer and an etch stop layer on a resistive memory layer; forming a main conductive layer on the etch stop layer; exposing a portion of the etch stop layer by patterning the main conductive layer; exposing a portion of the interfacial conductive layer by patterning the portion of the etch stop layer; forming an upper electrode structure by patterning the portion of the interfacial conductive layer; cleaning a surface of the upper electrode structure and an exposed surface of the resistive memory layer; and patterning the resistive memory layer using the upper electrode structure as an etch mask.

Abstract translation: 一种半导体器件制造方法，包括在电阻式存储器层上依次形成界面导电层和蚀刻停止层; 在所述蚀刻停止层上形成主导电层; 通过图案化主导电层来暴露蚀刻停止层的一部分; 通过对蚀刻停止层的部分进行构图来暴露界面导电层的一部分; 通过图案化界面导电层的一部分形成上电极结构; 清洁上电极结构的表面和电阻性存储层的暴露表面; 以及使用上电极结构作为蚀刻掩模来构图电阻存储层。

公开(公告)号：US20160020252A1

公开(公告)日：2016-01-21

申请号：US14872893

申请日：2015-10-01

Applicant: SK hynix Inc.

Inventor： Hyun Min LEE ,  Han Woo CHO

IPC: H01L27/24 ,  H01L45/00 ,  H01L43/02 ,  H01L27/22

CPC classification number: H01L27/2409 ,  H01L27/224 ,  H01L43/02 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/144 ,  H01L45/1683

Abstract: A variable resistance memory device and a method of manufacturing the same are provided. The variable resistance memory device includes a first insulating layer formed on a semiconductor substrate, the first insulating layer having a first hole formed therein. A switching device is formed in the first hole. A second insulating layer is formed over the first insulating layer and the second insulating layer includes a second hole. A lower electrode is formed along a surface of the second insulating layer that defines the second hole. A spacer is formed on the lower electrode and exposes a portion of the surface of the lower electrode. A variable resistance material layer is formed in the second hole, and an upper electrode is formed on the variable resistance material layer.

Abstract translation: 提供了一种可变电阻存储器件及其制造方法。 可变电阻存储器件包括形成在半导体衬底上的第一绝缘层，第一绝缘层具有形成在其中的第一孔。 开关装置形成在第一孔中。 在第一绝缘层上形成第二绝缘层，第二绝缘层包括第二孔。 沿着限定第二孔的第二绝缘层的表面形成下电极。 在下电极上形成间隔物，并露出下电极表面的一部分。 在第二孔中形成可变电阻材料层，在可变电阻材料层上形成上电极。

公开(公告)号：US20150207068A1

公开(公告)日：2015-07-23

申请号：US14676388

申请日：2015-04-01

Applicant: SK hynix Inc.

Inventor： Han Woo CHO ,  Hyo Seob YOON ,  Yong Seok LEE

IPC: H01L45/00

CPC classification number: H01L45/126 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1293 ,  H01L45/144 ,  H01L45/1691

Abstract: A resistive memory device and a fabrication method thereof are provided. The resistive memory device includes a bottom structure including a heating electrode, data storage materials, each of the data storage materials formed on the bottom structure in a confined structure perpendicular to the bottom structure, and having a lower diameter smaller than an upper diameter, an upper electrode formed on each of the data storage materials, and an insulation unit formed between adjacent data storage materials.

Abstract translation: 提供了一种电阻式存储器件及其制造方法。 电阻式存储器件包括底部结构，其包括加热电极，数据存储材料，每个数据存储材料形成在垂直于底部结构的约束结构中的底部结构上，并具有小于上部直径的较小直径， 形成在每个数据存储材料上的上电极以及形成在相邻数据存储材料之间的绝缘单元。