公开(公告)号：US20180130544A1

公开(公告)日：2018-05-10

申请号：US15866094

申请日：2018-01-09

Applicant: SK hynix Inc.

Inventor： Sam Kyu WON ,  Myung Su KIM ,  Jae Won CHA

IPC: G11C29/02 ,  G11C29/12 ,  G11C29/50 ,  G11C16/28 ,  G11C16/34

CPC classification number: G11C29/025 ,  G11C16/28 ,  G11C16/3459 ,  G11C16/349 ,  G11C29/12005 ,  G11C29/50004 ,  G11C2029/1202

Abstract: A method of operating a semiconductor memory device includes applying a program pulse at least once to each of a plurality of pages; performing a pre-read operation on a reference page among the plurality of pages through an initial test voltage; repeating the pre-read operation by controlling the initial test voltage until a result of the pre-read operation is a pass; setting the initial test voltage of when the result of the pre-read operation is the pass as a reference test voltage; and detecting a defective page among the plurality of pages by performing read operations on the plurality of pages through the reference test voltage.

公开(公告)号：US20150036433A1

公开(公告)日：2015-02-05

申请号：US14516759

申请日：2014-10-17

Applicant: SK hynix Inc.

Inventor： Seong Hun PARK ,  Jae Won CHA

IPC: G11C16/16 ,  G11C16/26

CPC classification number: G11C16/16 ,  G11C11/5642 ,  G11C16/02 ,  G11C16/0483 ,  G11C16/14 ,  G11C16/26

Abstract: A semiconductor memory device comprises a memory cell array including a plurality of memory blocks each including a plurality of pages, wherein each of the plurality of pages includes at least one flag cell indicating whether data is in a corresponding page, and a peripheral circuit configured to read data of flag cells of a selected memory block in response to an erase request and to omit an erase operation on the selected memory block based on the data of the flag cells.

Abstract translation: 半导体存储器件包括存储单元阵列，该存储单元阵列包括多个存储块，每个存储块包括多个页，其中，所述多个页中的每一个包括至少一个标志单元，指示数据是否在相应的页面中;外围电路被配置为 根据擦除请求读取所选存储器块的标志单元的数据，并根据标志单元的数据省略对所选存储块的擦除操作。

公开(公告)号：US20180174629A1

公开(公告)日：2018-06-21

申请号：US15638516

申请日：2017-06-30

Applicant: SK hynix Inc.

Inventor： Jin Yong SEONG ,  Gun Gi SONG ,  Young Sang AHN ,  Jae Won CHA

IPC: G11C7/24 ,  G11C7/10 ,  G06F11/30

CPC classification number: G11C7/24 ,  G06F11/3037 ,  G11C7/10 ,  G11C7/1063 ,  G11C16/22

Abstract: Provided herein may be a memory system and a method of operating the same. A semiconductor memory device may include a write protect pin mode setting unit configured to set, depending on a parameter value stored therein, a write protect pin of the semiconductor memory device as any one of an input pin and an output pin and a control logic configured to output, when the write protect pin serves as the output pin, internal state information of the semiconductor memory device to an external device.

公开(公告)号：US20160293271A1

公开(公告)日：2016-10-06

申请号：US14953194

申请日：2015-11-27

Applicant: SK hynix Inc.

Inventor： Sam Kyu WON ,  Myung Su KIM ,  Jae Won CHA

IPC: G11C29/04 ,  G11C16/34 ,  G11C16/12 ,  G11C16/28

CPC classification number: G11C29/025 ,  G11C16/28 ,  G11C16/3459 ,  G11C16/349 ,  G11C29/12005 ,  G11C29/50004 ,  G11C2029/1202

Abstract: A method of operating a semiconductor memory device includes applying a program pulse at least once to each of a plurality of pages; performing a pre-read operation on a reference page among the plurality of pages through an initial test voltage; repeating the pre-read operation by controlling the initial test voltage until a result of the pre-read operation is a pass; setting the initial test voltage of when the result of the pre-read operation is the pass as a reference test voltage; and detecting a defective page among the plurality of pages by performing read operations on the plurality of pages through the reference test voltage.

Abstract translation: 一种操作半导体存储器件的方法包括至少对多个页面中的每一个施加一个编程脉冲; 通过初始测试电压在多个页面中的参考页面上执行预读操作; 通过控制初始测试电压重复预读操作，直到预读操作的结果通过; 将预读操作的结果作为参考测试电压设置为初始测试电压; 以及通过参考测试电压对多个页面进行读取操作来检测多个页面中的缺陷页面。

公开(公告)号：US20160276033A1

公开(公告)日：2016-09-22

申请号：US14722796

申请日：2015-05-27

Applicant: SK hynix Inc.

Inventor： Jae Won CHA

IPC: G11C16/16

CPC classification number: G11C16/16 ,  G11C16/14 ,  G11C16/349 ,  G11C29/021 ,  G11C29/028 ,  G11C29/50 ,  G11C29/50004 ,  G11C2029/0409

Abstract: A nonvolatile memory device may include a plurality of memory blocks. The nonvolatile memory device may include a controller configured to perform an erase operation by repeating an erase loop, and may generate and store a test result based on a pass erase loop count of the erase operation in response to a result processing command. The erase loop may include applying an erase voltage to a target memory block among the memory blocks in response to an erase command.

Abstract translation: 非易失性存储器件可以包括多个存储器块。 非易失性存储器件可以包括被配置为通过重复擦除循环来执行擦除操作的控制器，并且可以响应于结果处理命令，生成并存储基于擦除操作的通过擦除循环计数的测试结果。 擦除环路可以包括响应于擦除命令将擦除电压施加到存储器块中的目标存储器块。