公开(公告)号：US20180374840A1

公开(公告)日：2018-12-27

申请号：US16061900

申请日：2016-12-22

申请人： SONY CORPORATION

发明人： Katsuhiko FUKASAKU ,  Daisuke NAKAGAWA

IPC分类号： H01L27/02 ,  H01L27/07 ,  H01L23/60

CPC分类号： H01L27/0274 ,  H01L21/822 ,  H01L23/60 ,  H01L27/0277 ,  H01L27/0285 ,  H01L27/04 ,  H01L27/0629 ,  H01L27/0705 ,  H03K19/00361

摘要： The present technology relates to a semiconductor integrated circuit which operates with a low voltage and is capable of preventing destruction of a protection circuit and a control method thereof. The semiconductor integrated circuit includes a resistance element and a capacitance element connected between a power supply line and a ground line in series, an inverter of which an input is connected between the resistance element and the capacitance element, a MOS transistor of which a gate electrode is connected to an output of the inverter and a drain electrode and a source electrode are respectively connected to the power supply line and the ground line, and a current limit element inserted between a well region where the MOS transistor is formed and the gate electrode. The present technology is applied to, for example, the protection circuit for preventing destruction of an internal circuit by ESD and the like.