Digital Class-D Amplifier and Digital Signal Processing Method
    1.
    发明申请
    Digital Class-D Amplifier and Digital Signal Processing Method 有权
    数字D类放大器和数字信号处理方法

    公开(公告)号:US20140347128A1

    公开(公告)日:2014-11-27

    申请号:US14358182

    申请日:2012-10-30

    Applicant: ST-Ericsson SA

    Abstract: A digital class D amplifier (10) is disclosed, comprising a pulse width modulator (PW Mod) comprising: a digital loop filter (Loop F) adapted to receive an input signal (x[n]) and a feedback signal (fb[n]), the digital loop filter (Loop_F) being adapted to process at a clock frequency (f_s) said input and feedback signals for providing as output a filtered digital signal (w[n]); a PWM conversion module (PW_CM) having an input (24) for receiving the filtered digital signal (w[n]) and having a first output (25) connected to the digital loop filter (Loop F), the PWM conversion module being adapted for processing the filtered digital signal (w[n]) and providing at said first output (25) the feedback signal (fb[n]). The PWM conversion module (PW_CM) comprises: a first comparator (CMP_N) adapted to compare the filtered digital signal (w[n]) with a first reference triangular waveform (VTn[n]) for providing as output a first PWM signal (yn[n]), the first reference triangular waveform having a frequency (f_osc) much lower than said clock frequency (f.s); a second comparator (CMP_P) adapted to compare the filtered digital signal (w[n]) with a second reference triangular waveform (VTp[n]) for providing as output a second PWM signal (yp[n]), the second reference triangular waveform (VTp[n]) being the inverse of the first triangular waveform (VTn[n]), said first (yn[n]) and second (yp[n]) PWM signals representing a differential output pulse width modulated signal (yn[n],yp[n]).

    Abstract translation: 公开了一种数字D类放大器(10),包括:脉冲宽度调制器(PW Mod),包括:适于接收输入信号(x [n])和反馈信号(fb [n])的数字环路滤波器 ]),所述数字环路滤波器(Loop_F)适于以时钟频率(f_s)处理所述输入和反馈信号,以提供经过滤波的数字信号(w [n])作为输出; PWM转换模块(PW_CM),其具有用于接收经过滤波的数字信号(w [n])并具有连接到数字环路滤波器(Loop F)的第一输出端25的输入端) 用于处理滤波后的数字信号(w [n])并在所述第一输出端提供反馈信号(fb [n])。 PWM转换模块(PW_CM)包括:第一比较器(CMP_N),适于将滤波后的数字信号(w [n])与第一参考三角波形(VTn [n])进行比较,以提供第一PWM信号 [n]),具有比所述时钟频率(fs)低得多的频率(f_osc)的第一参考三角波形; 适于将滤波后的数字信号(w [n])与第二参考三角波形(VTp [n])进行比较以用于提供第二PWM信号(yp [n])作为输出的第二比较器(CMP_P),第二参考三角形 波形(VTp [n])是第一三角波形(VTn [n])的倒数,所述第一(yn [n])和第二(yp [n])PWM信号表示差分输出脉宽调制信号 [n],yp [n])。

    Digital class-D amplifier and digital signal processing method
    2.
    发明授权
    Digital class-D amplifier and digital signal processing method 有权
    数字D类放大器和数字信号处理方法

    公开(公告)号:US09438182B2

    公开(公告)日:2016-09-06

    申请号:US14358182

    申请日:2012-10-30

    Applicant: ST-Ericsson SA

    Abstract: A digital class D amplifier (10) is disclosed, comprising a pulse width modulator (PW Mod) comprising: a digital loop filter (Loop F) adapted to receive an input signal (x[n]) and a feedback signal (fb[n]), the digital loop filter (Loop_F) being adapted to process at a clock frequency (f_s) said input and feedback signals for providing as output a filtered digital signal (w[n]); a PWM conversion module (PW_CM) having an input (24) for receiving the filtered digital signal (w[n]) and having a first output (25) connected to the digital loop filter (Loop F), the PWM conversion module being adapted for processing the filtered digital signal (w[n]) and providing at said first output (25) the feedback signal (fb[n]). The PWM conversion module (PW_CM) comprises: a first comparator (CMP_N) adapted to compare the filtered digital signal (w[n]) with a first reference triangular waveform (VTn[n]) for providing as output a first PWM signal (yn[n]), the first reference triangular waveform having a frequency (f_osc) much lower than said clock frequency (f.s); a second comparator (CMP_P) adapted to compare the filtered digital signal (w[n]) with a second reference triangular waveform (VTp[n]) for providing as output a second PWM signal (yp[n]), the second reference triangular waveform (VTp[n]) being the inverse of the first triangular waveform (VTn[n]), said first (yn[n]) and second (yp[n]) PWM signals representing a differential output pulse width modulated signal (yn[n],yp[n]).

    Abstract translation: 公开了一种数字D类放大器(10),包括:脉冲宽度调制器(PW Mod),包括:适于接收输入信号(x [n])和反馈信号(fb [n])的数字环路滤波器 ]),所述数字环路滤波器(Loop_F)适于以时钟频率(f_s)处理所述输入和反馈信号,以提供经过滤波的数字信号(w [n])作为输出; PWM转换模块(PW_CM),其具有用于接收经过滤波的数字信号(w [n])并具有连接到数字环路滤波器(Loop F)的第一输出端25的输入端) 用于处理滤波后的数字信号(w [n])并在所述第一输出端提供反馈信号(fb [n])。 PWM转换模块(PW_CM)包括:第一比较器(CMP_N),适于将滤波后的数字信号(w [n])与第一参考三角波形(VTn [n])进行比较,以提供第一PWM信号 [n]),具有比所述时钟频率(fs)低得多的频率(f_osc)的第一参考三角波形; 适于将滤波后的数字信号(w [n])与第二参考三角波形(VTp [n])进行比较以用于提供第二PWM信号(yp [n])作为输出的第二比较器(CMP_P),第二参考三角形 波形(VTp [n])是第一三角波形(VTn [n])的倒数,所述第一(yn [n])和第二(yp [n])PWM信号表示差分输出脉宽调制信号 [n],yp [n])。

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