公开(公告)号：US09455241B2

公开(公告)日：2016-09-27

申请号：US14754230

申请日：2015-06-29

Applicant: STMICROELECTRONICS PTE LTD

Inventor： Yonggang Jin ,  Kiyoshi Kuwabara ,  Xavier Baraton

IPC: H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L23/498 ,  H01L23/538 ,  H01L21/311 ,  H01L21/56 ,  H01L21/768

CPC classification number: H01L24/83 ,  H01L21/311 ,  H01L21/4821 ,  H01L21/486 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/768 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/5389 ,  H01L24/11 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2221/68381 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2518 ,  H01L2224/8385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/00

Abstract: Aspects of the invention are directed towards an integrated circuit package and method of forming the same, and more particularly to a redistributed chip packaging for an integrated circuit. The integrated circuit package includes an integrated circuit having a protective material on at least a portion of the integrated circuit. A lead frame is coupled to the integrated circuit and a conductive layer is also coupled to the interconnect. A solder ball is coupled to the conductive layer and a passivation layer is on the conductive layer. Active and passive components are electrically coupled to the integrated circuit.

Abstract translation: 本发明的方面涉及一种集成电路封装及其形成方法，更具体地涉及用于集成电路的重新分配的芯片封装。 集成电路封装包括在集成电路的至少一部分上具有保护材料的集成电路。 引线框架耦合到集成电路，并且导电层也耦合到互连。 焊球与导电层耦合，钝化层位于导电层上。 有源和无源部件电耦合到集成电路。