公开(公告)号：US20220059369A1

公开(公告)日：2022-02-24

申请号：US17407612

申请日：2021-08-20

Applicant: STMicroelectronics S.r.l.

Inventor： Marco ROVITTO ,  Pierangelo MAGNI ,  Fabio MARCHISI

IPC: H01L21/56 ,  H01L21/67 ,  H01L21/48

Abstract: A semiconductor die is attached to a die pad of a leadframe. The semiconductor die attached to the die pad is arranged in a molding cavity between complementary first and second mold portions. Package material is injected into the molding cavity via at least one injection channel provided in one of the complementary first and second mold portions. Air is evacuated from the molding cavity via at least one air venting channel provided in the other of the complementary first and second mold portions. An exit from the at least one air venting channel may be blocked by a retractable stopper during the injection of the package material.

公开(公告)号：US20180190563A1

公开(公告)日：2018-07-05

申请号：US15675483

申请日：2017-08-11

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Pierangelo MAGNI

IPC: H01L23/367 ,  H01L23/373

CPC classification number: H01L23/3672 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/5389 ,  H01L2224/12105 ,  H01L2224/32245 ,  H01L2224/73267

Abstract: A semiconductor device includes a layered package having a semiconductor die embedded therein, the semiconductor die coupled with a thermally-conductive element. The layered package includes, e.g., PCB boards with an intermediate layer having the semiconductor die arranged therein, and a pair of outer layers, with the thermally-conductive element including a thermally-conductive inlay in one of the outer layers.

公开(公告)号：US20230143539A1

公开(公告)日：2023-05-11

申请号：US17977137

申请日：2022-10-31

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Pierangelo MAGNI

IPC: H01L23/48 ,  H01L23/29 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L21/60 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L23/29 ,  H01L23/3135 ,  H01L23/49503 ,  H01L21/565 ,  H01L21/60 ,  H01L21/76877 ,  H01L2021/60292

Abstract: A semiconductor die is arranged on a substrate and an encapsulation of laser direct structuring (LDS) material is molded onto the semiconductor die. A through mold via (TMV) extends through the encapsulation. This TMV includes a collar section that extends through a first portion of the encapsulation from an outer surface to an intermediate level of the encapsulation, and a frusto-conical section that extends from a bottom of the collar section through a second portion of the encapsulation. The collar section has a first cross-sectional area at the intermediate level. The first end of the frusto-conical section has a second cross-section area at the intermediate level. The second cross-sectional area is smaller than the first cross-sectional area. The TMV can have an aspect ratio which is not limited to 1:1.

公开(公告)号：US20160315059A1

公开(公告)日：2016-10-27

申请号：US14980616

申请日：2015-12-28

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Paolo CREMA ,  Pierangelo MAGNI

IPC: H01L23/00 ,  B29C67/00 ,  G05B19/418

CPC classification number: H01L24/13 ,  B33Y80/00 ,  G05B19/418 ,  G05B2219/35134 ,  G05B2219/49007 ,  H01L22/32 ,  H01L24/11 ,  H01L2224/11312 ,  H01L2224/11318 ,  H01L2224/1143 ,  H01L2224/11505 ,  H01L2224/11552 ,  H01L2224/1183 ,  H01L2224/13015 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/13019 ,  H01L2224/13023 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: An electronic component, such as an integrated circuit, includes one or more circuits with bumps extending in a longitudinal direction outward from the circuit. The bumps may be formed, e.g., by 3D printing, with at least one protrusion extending away from the longitudinal direction.

Abstract translation: 诸如集成电路的电子部件包括具有从电路向外延伸的凸起的一个或多个电路。 凸起可以例如通过3D印刷形成，其中至少一个突起远离纵向方向延伸。

公开(公告)号：US20220406703A1

公开(公告)日：2022-12-22

申请号：US17823650

申请日：2022-08-31

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Pierangelo MAGNI

IPC: H01L23/498 ,  H01L21/48

Abstract: Leadframes for semiconductor devices are manufactured by providing a laminar substrate of laser direct structuring material, the laminar substrate comprising first and second opposed surfaces, applying laser beam processing to the substrate to provide a first pattern of electrically-conductive formations at the first surface, a second pattern of electrically-conductive formations at the second surface and electrically-conductive vias through the substrate between the first surface and the second surface. Electrically-conductive material is formed, for instance via electrolytic or electroless growth of electrically-conductive material such a copper onto the first and second pattern of electrically-conductive formations as well as onto the electrically-conductive vias provided by applying laser beam processing to the substrate. The electrically-conductive vias are coupled to one or both of the electrically-conductive formations in the first pattern of electrically-conductive formations and the second pattern of electrically-conductive formations.

公开(公告)号：US20210050299A1

公开(公告)日：2021-02-18

申请号：US16990748

申请日：2020-08-11

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Giovanni ZIGLIOLI ,  Alberto PINTUS ,  Michele DERAI ,  Pierangelo MAGNI

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/66 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: A method of manufacturing semiconductor devices, such as integrated circuits includes arranging one or more semiconductor dice on a support surface. Laser direct structuring material is molded onto the support surface having the semiconductor die/dice arranged thereon. Laser beam processing is performed on the laser direct structuring material molded onto the support surface having the semiconductor die/dice arranged thereon to provide electrically conductive formations for the semiconductor die/dice arranged on the support surface. The semiconductor die/dice provided with the electrically-conductive formations are separated from the support surface.

公开(公告)号：US20170125371A1

公开(公告)日：2017-05-04

申请号：US15175930

申请日：2016-06-07

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Pierangelo MAGNI ,  Alberto ARRIGONI

IPC: H01L23/00

Abstract: In an embodiment, a semiconductor device includes: a mounting substrate having electrically conductive formations thereon, a semiconductor die coupled with the mounting substrate, the semiconductor die with electrical contact pillars facing towards the mounting substrate, an anisotropic conductive membrane between the semiconductor die and the mounting substrate, the membrane compressed between the electrical contact pillars and the mounting substrate to provide electrical contact between the electrical contact pillars of the semiconductor die and the electrically conductive formations on the mounting substrate.

公开(公告)号：US20210167000A1

公开(公告)日：2021-06-03

申请号：US17108270

申请日：2020-12-01

Applicant: STMicroelectronics S.r.l.

Inventor： Federico Giovanni ZIGLIOLI ,  Alberto PINTUS ,  Pierangelo MAGNI

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56

Abstract: A plastic material substrate has a die mounting location for a semiconductor die. Metallic traces are formed on selected areas of the plastic material substrate, wherein the metallic traces provide electrically-conductive paths for coupling to the semiconductor die. The semiconductor die is attached onto the die mounting location. The semiconductor die attached onto the die mounting location is electrically bonded to selected ones of the metallic traces formed on the plastic material substrate. A package material is molded onto the semiconductor die attached onto the die mounting location.

公开(公告)号：US20200321274A1

公开(公告)日：2020-10-08

申请号：US16837565

申请日：2020-04-01

Applicant: STMicroelectronics S.r.l.

Inventor： Pierangelo MAGNI

IPC: H01L23/498 ,  H01L21/48

Abstract: Leadframes for semiconductor devices are manufactured by providing a laminar substrate of laser direct structuring material, the laminar substrate comprising first and second opposed surfaces, applying laser beam processing to the substrate to provide a first pattern of electrically-conductive formations at the first surface, a second pattern of electrically-conductive formations at the second surface and electrically-conductive vias through the substrate between the first surface and the second surface. Electrically-conductive material is formed, for instance via electrolytic or electroless growth of electrically-conductive material such a copper onto the first and second pattern of electrically-conductive formations as well as onto the electrically-conductive vias provided by applying laser beam processing to the substrate. The electrically-conductive vias are coupled to one or both of the electrically-conductive formations in the first pattern of electrically-conductive formations and the second pattern of electrically-conductive formations.

公开(公告)号：US20180342433A1

公开(公告)日：2018-11-29

申请号：US15975629

申请日：2018-05-09

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Federico Giovanni ZIGLIOLI ,  Pierangelo MAGNI

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L21/48

Abstract: A method of manufacturing semiconductor devices includes providing one or more semiconductor chips having a surface with electrical contact pads and a package mass encapsulating the semiconductor chip. The package mass includes a recessed portion leaving the semiconductor chip surface with the contact pads exposed, the recessed portion having a peripheral wall extending from the surface of the semiconductor chip to the outer surface of the package mass. Electrically-conductive formations are provided extending over the peripheral wall of the recessed portion with proximal ends electrically coupled with the contact pads of the semiconductor chip and distal ends at the outer surface of the package mass. The recessed portion is filled with a further package mass by leaving the distal ends of the electrically-conductive formations uncovered.