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1.
公开(公告)号:US20240297249A1
公开(公告)日:2024-09-05
申请号:US18583748
申请日:2024-02-21
Applicant: STMicroelectronics International N.V.
Inventor: Alfio GUARNERA , Mario Giuseppe SAGGIO , Cateno Marco CAMALLERI , Edoardo ZANETTI
CPC classification number: H01L29/7811 , H01L21/0465 , H01L29/0603 , H01L29/1608
Abstract: Method of manufacturing an electronic device, comprising the steps of: arranging a semiconductor body of N-type, having a lattice structure with spatial symmetry, comprising an active area an edge region surrounding the active area; forming, in the edge region, an intentionally damaged region wherein the lattice structure has no spatial symmetry; forming an edge termination region of P-type at the damaged region, by random implant; forming a current spreading layer, CSL, in the edge region at and lateral to the damaged region, by channeled implant. The CSL has, at the damaged region, a minimum thickness and, laterally to the damaged region, a maximum thickness. The minimum thickness is lower than the thickness of the edge termination region.
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2.
公开(公告)号:US20240297044A1
公开(公告)日:2024-09-05
申请号:US18583752
申请日:2024-02-21
Applicant: STMicroelectronics International N.V.
Inventor: Cateno Marco CAMALLERI , Mario Giuseppe SAGGIO , Edoardo ZANETTI , Gabriele BELLOCCHI
IPC: H01L21/04
CPC classification number: H01L21/0465
Abstract: A manufacturing process provides for: forming a semiconductor body of silicon carbide, having a front surface; performing a localized ion implantation to form implanted regions in implant portions in the semiconductor body. The step of performing a localized ion implantation provides for: forming damaged regions at the front surface, separated from each other by the implant portions in a direction parallel to the front surface; performing a channeled ion implantation, for implanting doping ions within the semiconductor body and forming the implanted regions at the implant portions of the semiconductor body. The channeled ion implantation is performed in a self-aligned manner with respect to the damaged regions, which represent damaged regions of the silicon-carbide crystallographic lattice such as to block a propagation of the channeled ion implantation along a vertical axis orthogonal to the front surface, in a depth direction of the semiconductor body.
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公开(公告)号:US20240297043A1
公开(公告)日:2024-09-05
申请号:US18583758
申请日:2024-02-21
Applicant: STMicroelectronics International N.V.
Inventor: Alfio GUARNERA , Cateno Marco CAMALLERI , Edoardo ZANETTI , Laura Letizia SCALIA , Mario Pietro BERTOLINI , Massimiliano CANTIANO , Massimo BOSCAGLIA , Mario Giuseppe SAGGIO
CPC classification number: H01L21/046 , H01L29/0619 , H01L29/1037 , H01L29/1095 , H01L29/66068 , H01L29/7802
Abstract: A process for manufacturing a power electronic device, envisages: forming a semiconductor body of silicon carbide, having a first electrical conductivity and a first doping value, and defining a front surface; forming a Current Spreading Layer, CSL, in a surface portion of said semiconductor body facing the front surface, having the first electrical conductivity and a second doping value, greater than the first doping value; forming elementary cells of the power electronic device in an active area of the semiconductor body at the front surface. The step of forming the current spreading layer envisages performing a channeled ion implantation, in a channeling condition, for implanting doping ions having the first electrical conductivity within the semiconductor body.
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