公开(公告)号：US20240364340A1

公开(公告)日：2024-10-31

申请号：US18627941

申请日：2024-04-05

Applicant: STMicroelectronics International N.V.

Inventor： Manoj Kumar TIWARI ,  Kailash KUMAR

IPC: H03K19/0185

CPC classification number: H03K19/018521

Abstract: A level shifter having current boosting stages is provided. The level shifter includes a level shifting stage including a plurality of transistors and first and second nodes. The level shifting stage is configured to transfer a first signal of a first voltage domain to a second signal of a second voltage domain. A plurality of current boosting stages are associated with the transistors, respectively. A first current boosting stage provides a first boosting stage current path to support a first level shifter current path of a first transistor of the plurality of transistors in response to: a first supply voltage of the first voltage domain being greater than a second supply voltage of the second voltage domain, the first signal having a first logical state and the first node having a logical state reflecting that the first signal has a second logical state different from the first logical state.

公开(公告)号：US20220416792A1

公开(公告)日：2022-12-29

申请号：US17843693

申请日：2022-06-17

Applicant: STMicroelectronics International N.V.

Inventor： Kailash KUMAR ,  Ravinder KUMAR

IPC: H03K19/0185 ,  H03K19/003

Abstract: An integrated circuit includes an output pad, and I/O driver that drives data to the output pad, and a predriver that controls the I/O driver. The integrated circuit includes maximum voltage generator that receives a first supply voltage and a second supply voltage and outputs to the predriver a maximum voltage corresponding to the higher of the first supply voltage and the second supply voltage.

公开(公告)号：US20220416768A1

公开(公告)日：2022-12-29

申请号：US17843780

申请日：2022-06-17

Applicant: STMicroelectronics International N.V.

Inventor： Kailash KUMAR ,  Manoj KUMAR

IPC: H03K3/012 ,  H03K3/3565

Abstract: An integrated circuit includes an input pad and a Schmitt trigger coupled to the input pad. The Schmitt trigger includes a main PMOS branch that charges an intermediate node of the Schmitt trigger responsive to voltage transitions at the input node. The Schmitt trigger includes a charging assistance circuit that helps to rapidly charge the intermediate node of the Schmitt trigger. The charging assistance circuit includes a parallel PMOS branch in parallel with the main PMOS branch.

公开(公告)号：US20210248104A1

公开(公告)日：2021-08-12

申请号：US17143679

申请日：2021-01-07

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics (Rousset) SAS

Inventor： Manoj KUMAR ,  Kailash KUMAR ,  Nicolas DEMANGE

IPC: G06F13/42 ,  G06F1/06

Abstract: A serial peripheral interface (SPI) device includes a serial clock (SCK) pad receiving a serial clock, first and second Schmitt triggers directly electrically connected to the SCK pad to selectively respectively generate first and second clocks in response to rising and falling edges of the serial clock, first and second flip flops clocked by the first and second clocks to output bits of data to a data node, a multiplexer having an input coupled to the data node and an output coupled to driving circuitry, and driving circuitry transmitting data via a master-in-slave-out (MISO) pad.