公开(公告)号：US12072372B2

公开(公告)日：2024-08-27

申请号：US17903344

申请日：2022-09-06

Applicant: STMicroelectronics S.r.l.

Inventor： Matteo Brivio ,  Nicola De Campo ,  Matteo Venturelli

IPC: G01R31/28

CPC classification number: G01R31/2834

Abstract: A system, method, and device to test an electronic circuit are disclosed having a stage to supply a driving signal to a load comprising a pull-up switch and a pull-down switch and a pre-driver stage including pre-driver circuits. The electronic circuit including circuits for testing the pre-driver stage under the control of an automatic testing equipment (ATE) to operate a built-in self-test sequence including test commands for the pre-driver stage under the control of an external test signal issued by the ATE. The system includes a time measuring circuit to measure duration of signals at the output of the stage coupled to a pass-fail check circuit, and to evaluate if the duration of signals at the output of the stage to determine whether the output satisfies a pass criterion.

公开(公告)号：US12105143B2

公开(公告)日：2024-10-01

申请号：US17967089

申请日：2022-10-17

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Leonardo Pedone ,  Simone Scaduto ,  Rossella Gaudiano ,  Matteo Brivio ,  Matteo Venturelli

IPC: H03M1/78 ,  G01R31/317 ,  H03M1/74

CPC classification number: G01R31/31724 ,  G01R31/31706 ,  H03M1/742 ,  H03M1/785

Abstract: A digital-to-analog converter (DAC) includes a switching network and built-in-self-test (BIST) circuitry. The DAC, in operation, generates analog output signals in response to input codes of a set of input codes of the DAC. The BIST circuitry sequentially applies codes of a determined subset of codes of the set of input codes to test the plurality of switches. The determined subset of codes has fewer codes than the set of input codes. The BIST circuitry detects failures of switches of the plurality of switches based on responses of the DAC to the applied codes. In response to detecting a failure of a switch, the BIST generates a signal indicating a failure of the switching network.

公开(公告)号：US11531064B2

公开(公告)日：2022-12-20

申请号：US17514568

申请日：2021-10-29

Applicant: STMicroelectronics S.r.l.

Inventor： Matteo Brivio ,  Matteo Venturelli ,  Nicola De Campo

IPC: G01R31/3183 ,  G01R31/28 ,  G01R31/317 ,  G11C29/56 ,  G01R31/30 ,  G11C29/02

Abstract: In an embodiment a method for testing a digital electronic circuit includes coupling an external test equipment to a digital electronic circuit in order to apply an external voltage signal to the digital electronic circuit when an automatic test pattern generation (ATPG) procedure with a given test pattern is performed, wherein a value of the external voltage signal is controlled by the external test equipment and measuring, at the external test equipment, the digital supply voltage at an output of the voltage regulator and at an input of the internal digital circuitry, wherein the external voltage signal is applied to the differential inputs of the op-amp voltage regulator through an adaptation circuit to obtain determined values of the digital supply voltage.

公开(公告)号：US12163997B2

公开(公告)日：2024-12-10

申请号：US18151330

申请日：2023-01-06

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Nicola De Campo ,  Matteo Venturelli ,  Matteo Brivio ,  Mauro Foppiani

IPC: G01R31/28 ,  G01R19/00

Abstract: A system for testing is provided. The system includes an electronic circuit and an automatic testing equipment (ATE). The electronic circuit includes a voltage monitor including a resistive divider receiving at its voltage input an input voltage and coupled at its output to an input of a comparator. A reference input of the comparator is coupled to a generator supplying a reference voltage setting one or more thresholds of the comparator. The electronic circuit includes a Built In Self Test Module coupled to the ATE and to the inputs and output of the comparator. The BIST module is being configured upon receiving respective commands from the ATE to test a reaction time of the comparator and an offset of the comparator. The ATE performs a respective test of the ratio of the resistor divider by a first voltage measurement and a test of the reference voltage provided by the generator.

公开(公告)号：US20230079831A1

公开(公告)日：2023-03-16

申请号：US17903344

申请日：2022-09-06

Applicant: STMicroelectronics S.r.l.

Inventor： Matteo Brivio ,  Nicola De Campo ,  Matteo Venturelli

IPC: G01R31/28

Abstract: A system, method, and device to test an electronic circuit are disclosed having a stage to supply a driving signal to a load comprising a pull-up switch and a pull-down switch and a pre-driver stage including pre-driver circuits. The electronic circuit including circuits for testing the pre-driver stage under the control of an automatic testing equipment (ATE) to operate a built-in self-test sequence including test commands for the pre-driver stage under the control of an external test signal issued by the ATE. The system includes a time measuring circuit to measure duration of signals at the output of the stage coupled to a pass-fail check circuit, and to evaluate if the duration of signals at the output of the stage to determine whether the output satisfies a pass criterion.

公开(公告)号：US11990829B2

公开(公告)日：2024-05-21

申请号：US17698791

申请日：2022-03-18

Applicant: STMicroelectronics S.r.l.

Inventor： Matteo Venturelli ,  Nicola De Campo

IPC: H02M1/00 ,  H02M3/07 ,  H02P7/29 ,  H02P7/293

CPC classification number: H02M1/0045 ,  H02M1/0085 ,  H02M3/07 ,  H02P7/29 ,  H02P7/293

Abstract: A configurable voltage regulating circuit includes first through fourth switches. A flying capacitor is coupled between a common mode node and a pump node, and a sense resistance network is coupled between an output node and an input of an error amplifier and configured to provide a sensed output voltage. The error amplifier receives at another input a reference voltage and generates an error signal. A charging circuit supplies a charging current to the pump node, and controls the value of the charging current as a function of the error signal. A switch command signals generator generates respective first, second, third, and fourth switch signals to control the first switch, second switch, third switch, and fourth switch. The generator sets the configurable voltage regulating circuit as either a charge pump or a linear regulator based the input voltage being less than a first threshold or greater than a second threshold.

公开(公告)号：US20220137131A1

公开(公告)日：2022-05-05

申请号：US17514568

申请日：2021-10-29

Applicant: STMicroelectronics S.r.l.

Inventor： Matteo Brivio ,  Matteo Venturelli ,  Nicola De Campo

IPC: G01R31/3183

Abstract: In an embodiment a method for testing a digital electronic circuit includes coupling an external test equipment to a digital electronic circuit in order to apply an external voltage signal to the digital electronic circuit when an automatic test pattern generation (ATPG) procedure with a given test pattern is performed, wherein a value of the external voltage signal is controlled by the external test equipment and measuring, at the external test equipment, the digital supply voltage at an output of the voltage regulator and at an input of the internal digital circuitry, wherein the external voltage signal is applied to the differential inputs of the op-amp voltage regulator through an adaptation circuit to obtain determined values of the digital supply voltage.