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公开(公告)号:US20220302379A1
公开(公告)日:2022-09-22
申请号:US17833415
申请日:2022-06-06
Inventor: Paolo Giuseppe CAPPELLETTI , Gabriele NAVARRO
Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.
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公开(公告)号:US20220238603A1
公开(公告)日:2022-07-28
申请号:US17581557
申请日:2022-01-21
Applicant: STMicroelectronics S.r.l.
Inventor: Paolo Giuseppe CAPPELLETTI , Andrea REDAELLI
Abstract: An electronic cell includes an integrated stack of structures including, successively: a first electrode; an ovonic threshold switch layer below the first electrode; and a fixed resistor below the ovonic threshold switch layer. A second electrode may be included between fixed resistor and the ovonic threshold switch layer. A memory layer, for example a phase change material layer, a resistive random-access memory layer or a magneto-resistive random-access memory layer, may be included between the first electrode and the ovonic threshold switch layer.
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公开(公告)号:US20200052199A1
公开(公告)日:2020-02-13
申请号:US16533255
申请日:2019-08-06
Applicant: STMicroelectronics S.r.l. , Commissariat A L'Energie Atomique et aux Energies Atternatives
Inventor: Paolo Giuseppe CAPPELLETTI , Gabriele NAVARRO
Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.
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公开(公告)号:US20230389450A1
公开(公告)日:2023-11-30
申请号:US18305268
申请日:2023-04-21
Applicant: STMICROELECTRONICS S.r.l. , COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Inventor: Paolo Giuseppe CAPPELLETTI , Gabriele NAVARRO
CPC classification number: H10N70/231 , G11C13/0004 , G11C13/0069 , H10N70/8413 , H10N70/8828 , G11C2013/008
Abstract: Phase-change memory cells and methods of manufacturing and operating phase-change memory cells are provided. In at least one embodiment, a phase-change memory cell includes a heater and a stack. The stack includes at least one germanium layer or a nitrogen doped germanium layer, and at least one layer of a first alloy including germanium, antimony, and tellurium. A resistive layer is located between the heater and the stack.
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公开(公告)号:US20200381618A1
公开(公告)日:2020-12-03
申请号:US16883190
申请日:2020-05-26
Applicant: STMicroelectronics S.r.l.
Inventor: Paolo Giuseppe CAPPELLETTI
Abstract: A phase-change memory cell is formed by a heater, a crystalline layer disposed above the heater, and an insulating region surrounding sidewalls of the crystalline layer. The phase-change memory cell supports programming with a least three distinct data levels based on a selective amorphization of the crystalline layer.
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公开(公告)号:US20230032898A1
公开(公告)日:2023-02-02
申请号:US17874595
申请日:2022-07-27
Inventor: Paolo Giuseppe CAPPELLETTI , Fausto PIAZZA , Andrea REDAELLI
Abstract: A memory cell includes a substrate with a semiconductor region and an insulating region. A first insulating layer extends over the substrate. A phase change material layer rests on the first insulating layer. The memory cell further includes an interconnection network with a conductive track. A first end of a first conductive via extending through the first insulating layer is in contact with the phase change material layer and a second end of the first conductive via is in contact with the semiconductor region. A first end of a second conductive via extending through the first insulating layer is in contact with both the phase change material layer and the conductive track, and a second end of the second conductive via is in contact only with the insulating region.
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公开(公告)号:US20210249594A1
公开(公告)日:2021-08-12
申请号:US17166474
申请日:2021-02-03
Applicant: STMicroelectronics S.r.l. , Commissariat a l'Energie Atomique et aux Energies Alternatives
Inventor: Paolo Giuseppe CAPPELLETTI , Gabriele NAVARRO
Abstract: Phase-change memory cells and methods of manufacturing and operating phase-change memory cells are provided. In at least one embodiment, a phase-change memory cell includes a heater and a stack. The stack includes at least one germanium layer or a nitrogen doped germanium layer, and at least one layer of a first alloy including germanium, antimony, and tellurium. A resistive layer is located between the heater and the stack.
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公开(公告)号:US20200052198A1
公开(公告)日:2020-02-13
申请号:US16533184
申请日:2019-08-06
Applicant: STMicroelectronics S.r.l. , Commissariat A L'Energie Atomique et aux Energies Alternatives
Inventor: Paolo Giuseppe CAPPELLETTI , Gabriele NAVARRO
Abstract: A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium. In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.
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