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公开(公告)号：US20230378923A1
公开(公告)日：2023-11-23
申请号：US17747845
申请日：2022-05-18
发明人： Jian Wen , Davide Luigi Brambilla , Qiyu Liu , Mei Yang , Shuming Tong , Francesco Stilgenbauer
CPC分类号： H03G3/3026 , H03G3/348 , H03G3/3036 , H03K4/06
摘要： In an embodiment, an amplifier circuit includes a second stage that includes a first switch circuit including first and second terminals, a plurality of resistive elements coupled between the first and second terminals of the first switch circuit, and a plurality of switches configured to control an equivalent resistance between the first and second terminals of the first switch circuit. During play mode, the second stage has a gain between the input of the second stage and the output of the second stage of a first value. During a transition from mute mode to play mode, the amplifier circuit is configured to progressively increase the gain of the second stage from a second value to the first value. During a transition from play mode to mute mode, the amplifier circuit is configured to progressively decrease the gain of the second stage from the first value to the second value.
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公开(公告)号：US11804814B1
公开(公告)日：2023-10-31
申请号：US17719613
申请日：2022-04-13
CPC分类号： H03G3/344 , H04R3/00 , H03G2201/103 , H04R2430/01
摘要： A digital audio playback circuit includes a noise shaping circuit configured to receive an input digital audio signal, and a digital to analog converter (DAC) configured to convert the input digital audio signal to a pre-amplified output analog audio signal according to a gain ramp defined by a gain control signal. A muting circuit is configured to compare input digital audio signal to a threshold and assert a mute control signal when the input digital audio signal is below the threshold. An analog gain control ramp circuit is configured to generate the gain control signal in response to the mute control signal to cause the gain ramp to ramp down. An amplifier is configured to amplify the pre-amplified output analog audio signal for playback by an audio playback device.
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公开(公告)号：US12003247B2
公开(公告)日：2024-06-04
申请号：US17846520
申请日：2022-06-22
CPC分类号： H03M1/0668 , H03M1/0626 , H03M1/0648 , H03M3/492 , H03M3/51
摘要： A signal processing circuit includes a filter generating a quantizer input signal from a noise shaping input signal and a quantizer output signal. A quantizer divides the quantizer input signal by a scaling factor to produce a noise shaping output signal and multiplies the noise shaping output signal by the scaling factor to produce the quantizer output signal. Receiver circuitry scales the quantizer output signal by a second scaling factor. A dynamic range optimization circuit compares a current value of the noise shaping input signal to a threshold value, lowers or raises the scaling factor in response to the comparison, and proportionally lowers or raises the scaling factor such that a ratio between the scaling factor and second scaling factor remains substantially constant.
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