Abstract:
A method of driving a display panel is provided. The method includes displaying a first image on at least one odd-numbered horizontal line of the display panel along a first direction and a second direction during a first period of a frame period and displaying a second image on at least one even-numbered horizontal line of the display panel along the first direction and second direction during a second period of the frame period.
Abstract:
A display device includes first data lines including first color data lines connected to first sub-pixels, second color data lines connected to second sub-pixels, and third color data lines connected to third sub-pixels, and fan out lines including first fan out lines, second fan out lines alternately arranged with the first fan out lines in a peripheral region, and third fan out lines, a data driver outputting data voltages to the first fan out lines and the second fan out lines connected to the first data lines in a first arrangement according to the first arrangement, and output the data voltages to the third fan out lines connected to the first data lines in a second arrangement according to the second arrangement, and a timing controller remapping input image data based on the first arrangement.
Abstract:
A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.
Abstract:
A display device may include: a plurality of pixels; a gate driver that receives clock signals and generates and applies a plurality of gate signals to a respective plurality of gate lines connected to the plurality of pixels; and a clock signal driver. The clock signal driver may output the clock signals and receive feedback clock signals derived from the clock signals, compare the feedback clock signals, and control amplitudes of the clock signals so that an amplitude difference between the feedback clock signals is less than a threshold.
Abstract:
Provided is a data driver including a digital to analog converter configured to convert image signal data into a plurality of data voltages, and an output buffer unit including a plurality of channels for outputting the plurality of data voltages. The output buffer unit includes a plurality of output blocks. Each output block includes one or more channels. Data voltages outputted from a first output block among the plurality of output blocks are delayed with a first time difference. Data voltages outputted from a second output block among the plurality of output blocks are delayed with a second time difference which is different from the first time difference.
Abstract:
A display device includes: a control board on which a timing controller (TCON) and a power management integrated circuit (PMIC) are installed; a first source board on which a driving integrated circuit (IC) is installed; and a first connection cable that connects the control board and the first source board. The control board includes a first sensing line that connects the PMIC to the first connection cable and a third feedback line that connects the first connection cable to the TCON, the first connection cable includes a second sensing line that connects the first sensing line to the first source board and a second feedback line that connects the third feedback line to the first source board, and the first source board includes a third sensing line connected to the second sensing line and a first feedback line connected to the second feedback line.
Abstract:
A method of driving a display panel is provided. The method includes displaying a first image on at least one odd-numbered horizontal line of the display panel along a first direction and a second direction during a first period of a frame period and displaying a second image on at least one even-numbered horizontal line of the display panel along the first direction and second direction during a second period of the frame period.
Abstract:
A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.
Abstract:
A display device includes a display panel including first and second panel pads electrically connected to each other, a connection board including first and second connection board pads connected to the first and second panel pads, respectively, an output pad, and a driving circuit. The driving circuit includes a pull-up resistor connected between a first voltage terminal and a first node, and a comparator configured to compare a voltage at the first node with a reference voltage and to output a contact test signal corresponding to a comparison result to the output pad. The first connection board pad is electrically connected to the first node, and the second connection board pad is connected to a second voltage terminal.
Abstract:
A display device may include: a plurality of pixels; a gate driver that receives clock signals and generates and applies a plurality of gate signals to a respective plurality of gate lines connected to the plurality of pixels; and a clock signal driver. The clock signal driver may output the clock signals and receive feedback clock signals derived from the clock signals, compare the feedback clock signals, and control amplitudes of the clock signals so that an amplitude difference between the feedback clock signals is less than a threshold.