Abstract:
A display device includes: a display panel including a plurality of pixels, a pixel from among the pixels being coupled to a scan line and a data line; a scan driver configured to supply a first scan signal to the scan line in a scan period in one frame, and to supply a second scan signal to the scan line in a compensation period after the scan period; and a data driver configured to supply a first data signal to the data line in synchronization with the first scan signal, and to supply a second data signal to the data line in synchronization with the second scan signal, wherein the first data signal is generated based on input image data supplied from an image source, and the second data signal is generated based on a conversion image data obtained by converting a grayscale of the input image data.
Abstract:
A pixel includes a first transistor connected between a data line and a first node, a second transistor including a second electrode connected to a second node, and a gate electrode connected to the first node, a third transistor connected between a reference power supply and the first node, a fourth transistor including a first electrode connected to a first power supply, and a second electrode connected to a first electrode of the second transistor, a capacitor including a first electrode connected to the first node, and a second electrode connected to the second node, an organic light emitting diode connected between the second node and a second power supply, a fifth transistor connected to an anode of the organic light emitting diode, and a sixth transistor including a first electrode connected to the fifth transistor, and a second electrode connected to an initialization power supply.
Abstract:
An organic light emitting diode display including: a substrate; a plurality of first signal lines on the substrate extending in a first direction; a first insulating layer covering the substrate and the first signal lines; a plurality of auxiliary signal lines formed on the first insulating layer and overlapping the first signal lines; a second insulating layer covering the auxiliary signal lines; a plurality of first signal line connecting members formed on the second insulating layer while overlapping parts of the auxiliary signal lines; a plurality of second signal lines crossing the first signal lines; a plurality of switching transistors and a plurality of driving transistors connected with the first signal lines and the second signal lines; and a plurality of organic light emitting diodes electrically connected to the driving transistors, where the first signal line connecting members connect the first signal lines to the auxiliary signal lines.
Abstract:
An organic light-emitting display and a method of manufacturing an organic light-emitting display are described. According to an aspect, the organic light-emitting display includes a substrate, a photodiode on the substrate, a planarization layer covering the photodiode, a first electrode on the planarization layer, a pixel defining layer at least partially exposing the first electrode, an organic layer covering the first electrode which is exposed by the pixel defining layer and a second electrode covering the pixel defining layer and the organic layer.
Abstract:
A display device includes an active pattern disposed on a substrate, a first transistor, a first scan line, a first power voltage line, a first electrode pattern and an organic light-emitting layer disposed on the substrate. The first transistor includes a first gate electrode disposed in a first overlapping area of the active pattern where the first gate electrode overlaps the active pattern. The first scan line is disposed adjacent to the first gate electrode. The first power voltage line includes a first electrode portion and a second electrode portion. The first electrode portion overlaps the first gate electrode. The second electrode portion extends from the first electrode portion in a direction crossing the first scan line and overlaps the first scan line.
Abstract:
A display device includes a plurality of pixels. Each pixel includes a first transistor that controls an amount of current received from a first power supply voltage line connected via a second node to an organic light emitting diode in response to a voltage of a first node, a second transistor connected between a data line and the second node and that includes a first gate electrode connected to a first scan line, a light emitting line connected to a gate electrode of at least one light emitting transistor located in a current path between the first power supply voltage line and the organic light emitting diode, and a seventh transistor connected between one of at least one second gate electrode of the second transistor and the light emitting line. Accordingly, a threshold voltage of a switching transistor included in each of the plurality of pixels may be negatively shifted.
Abstract:
A display device including a substrate which has a plurality of pixels each including an emission portion and a non-emission portion, a first electrode which is disposed on the emission portion, a pixel definition layer which is disposed on an edge of the first electrode and the non-emission portion, a common organic layer which is disposed on the first electrode and the pixel definition layer, an organic light-emitting layer which is disposed on the common organic layer and overlaps the emission portion, and a second electrode which is disposed on the common organic layer and the organic light-emitting layer. The pixel definition layer includes a plurality of pits between adjacent pixels. The common organic layer and the second electrode are separated by the pits.
Abstract:
A circuit stage including a first transistor including a first electrode and a gate electrode, the first electrode being coupled to a first input terminal and the gate electrode being coupled to a second input terminal configured to receive a first clock signal, an output circuit coupled to the second input terminal and a second power input terminal, an input circuit coupled to a second electrode of the first transistor and to a third input terminal, the third input terminal being configured to receive a first control clock signal, the input circuit being configured to control voltages of the second node and a third node, a first driving circuit coupled to a first power input terminal and to a fourth input terminal configured to receive a second control clock signal, and a second driving circuit coupled to the fourth input terminal and the third node.
Abstract:
A display device including: first pixels connected to a first write line and a first compensation line; second pixels connected to a second write fine and a second compensation line; third pixels connected to a third write line and a third compensation line; fourth pixels connected to a fourth write line and a fourth compensation line; fifth pixels connected to a fifth write line and a fifth compensation line; sixth pixels connected to a sixth write line and a sixth compensation line; seventh pixels connected to a seventh write line and a seventh compensation line; and eighth pixels connected to an eighth write line and an eighth compensation line, the first to fourth compensation lines are connected to a first node, the fifth and sixth compensation lines are connected to a second node, the seventh and eighth compensation lines are connected to a third node.
Abstract:
An organic light emitting diode display device includes a substrate, a light emitting layer, a first power supply wire, a second power supply wire, a connection pattern, and an upper electrode. The substrate has a display region, a peripheral region surrounding the display region and including first, second, and third peripheral regions, and a pad region disposed on one side of the peripheral region. The light emitting layer is disposed in the display region on the substrate. The first power supply wire is disposed in the second and third peripheral regions and a part of the first peripheral region on the substrate. The second power supply wire is disposed in the display region, the first peripheral region, and the third peripheral region on the substrate without being disposed in the second peripheral region, and is located inward of the first power supply wire.