ARRAY SUBSTRATE AND A DISPLAY DEVICE HAVING THE SAME
    1.
    发明申请
    ARRAY SUBSTRATE AND A DISPLAY DEVICE HAVING THE SAME 有权
    阵列基板和具有该基板的显示装置

    公开(公告)号:US20150129963A1

    公开(公告)日:2015-05-14

    申请号:US14224779

    申请日:2014-03-25

    IPC分类号: H01L27/12

    CPC分类号: H01L27/124 H01L29/41733

    摘要: An array substrate includes a substrate, a plurality of gate lines extending in a first direction on the substrate, a plurality of data lines including first and second data line pairs separated by cutting portions and a plurality of active patterns electrically connected to the first and second data line pairs. The data lines extend in a second direction crossing the first direction. The active patterns overlap the cutting portion and overlap a first gate line.

    摘要翻译: 阵列基板包括基板,在基板上沿第一方向延伸的多条栅极线,多条数据线,包括由切割部分分开的第一和第二数据线对以及电连接到第一和第二 数据线对。 数据线沿与第一方向交叉的第二方向延伸。 活动图案与切割部分重叠并且与第一栅极线重叠。

    Display device
    2.
    发明授权

    公开(公告)号:US09734777B2

    公开(公告)日:2017-08-15

    申请号:US14587788

    申请日:2014-12-31

    IPC分类号: G09G3/20 G09G3/36 G09G3/00

    摘要: A display device that may be driven at both frequencies of 120 Hz and 240 Hz, includes a plurality of pixels arranged in a column direction and a row direction, a plurality of data lines connected with one of the pixels of a j-th row (‘j’ is a natural number) and one of the pixels of a (j+1)-th row in k-th column (‘k’ is a natural number), and connected with one of the pixels of a (j+2)-th row and one of the pixels of a (j+3)-th row in (k−1)-th column, a first gate circuit part configured to apply a gate signal to a (4m−3)-th gate line row (‘m’ is a natural number), a second gate circuit part configured to apply a gate signal to a (4m−2)-th gate line row, a third gate circuit part configured to apply a gate signal to a (4m−1)-th gate line row and a fourth gate circuit part configured to apply a gate signal to a 4m-th gate line row.

    Liquid crystal display device
    4.
    发明授权
    Liquid crystal display device 有权
    液晶显示装置

    公开(公告)号:US09448453B2

    公开(公告)日:2016-09-20

    申请号:US14453699

    申请日:2014-08-07

    IPC分类号: G02F1/1343 G02F1/1362

    摘要: A liquid crystal display device includes upper and lower pixels; gate lines in electrical connection with the adjacent pixels and extending in a row direction, and data lines which cross the gate lines; and a reference voltage line including a vertical portion which passes through the adjacent pixels, and horizontal portions which alternately extend from the vertical portion. Each of the adjacent pixels includes first and second thin film transistors (TFTs) each in electrical connection with a gate line and a data line which correspond to a respective pixel; and a pixel electrode including a first subpixel electrode in connection with an output terminal of the first TFT, and a second subpixel electrode in connection with an output terminal of the second TFT. The horizontal portions of the reference voltage line are in electrical connection with the second subpixel electrodes of the adjacent pixels.

    摘要翻译: 液晶显示装置包括上下像素; 栅极线与相邻像素电连接并沿行方向延伸,以及跨越栅极线的数据线; 以及包括穿过相邻像素的垂直部分的参考电压线以及从垂直部分交替延伸的水平部分。 每个相邻像素包括与栅极线和对应于相应像素的数据线电连接的第一和第二薄膜晶体管(TFT); 以及与第一TFT的输出端子连接的第一子像素电极和与第二TFT的输出端子连接的第二子像素电极的像素电极。 参考电压线的水平部分与相邻像素的第二子像素电极电连接。

    DISPLAY DEVICE
    6.
    发明申请
    DISPLAY DEVICE 有权
    显示设备

    公开(公告)号:US20160035261A1

    公开(公告)日:2016-02-04

    申请号:US14587788

    申请日:2014-12-31

    IPC分类号: G09G3/20 H04N13/04

    摘要: A display device that may be driven at both frequencies of 120 Hz and 240 Hz, includes a plurality of pixels arranged in a column direction and a row direction, a plurality of data lines connected with one of the pixels of a j-th row (‘j’ is a natural number) and one of the pixels of a (j+1)-th row in k-th column (‘k’ is a natural number), and connected with one of the pixels of a (j+2)-th row and one of the pixels of a (j+3)-th row in (k−1)-th column, a first gate circuit part configured to apply a gate signal to a (4m−3)-th gate line row (‘m’ is a natural number), a second gate circuit part configured to apply a gate signal to a (4m−2)-th gate line row, a third gate circuit part configured to apply a gate signal to a (4m−1)-th gate line row and a fourth gate circuit part configured to apply a gate signal to a 4m-th gate line row.

    摘要翻译: 可以在120Hz和240Hz的两个频率下驱动的显示装置包括沿列方向和行方向排列的多个像素,与第j行的像素之一连接的多条数据线 'j'是自然数),并且第k列('k'中的第(j + 1)行的像素中的一个是自然数),并且与(j + (第k-1)列中的第(j + 3)行的像素和第二行中的一个像素,第一栅极电路部分,被配置为将栅极信号施加到第(4m-3) 栅极线行(“m”是自然数),被配置为向第(4m-2)栅极线行施加栅极信号的第二栅极电路部分,被配置为向栅极线施加栅极信号的第三栅极电路部分 (4m-1)栅极线行和第四栅极电路部分,被配置为向第4m栅极线行施加栅极信号。

    Display substrate, method of manufacturing the same and display apparatus having the same
    7.
    发明授权
    Display substrate, method of manufacturing the same and display apparatus having the same 有权
    显示基板及其制造方法以及具有该基板的显示装置

    公开(公告)号:US09214401B2

    公开(公告)日:2015-12-15

    申请号:US14312912

    申请日:2014-06-24

    摘要: A display substrate includes a base substrate including a display area and a peripheral area surrounding the display area, a switching element in the display area, a main-test-line in the peripheral area, extending in the second direction and electrically connected with a data line, a sub-test-line in the peripheral area, and a test pad in the peripheral area and electrically connected with the main-test-line and the sub-test-line. The switching element is electrically connected with a gate line extending in a first direction and the data line extending in a second direction crossing the first direction. The sub-test-line is electrically connected with the data line. The sub-test-line is in a different layer from the main-test-line.

    摘要翻译: 显示基板包括:基板,包括显示区域和围绕显示区域的外围区域;显示区域中的开关元件;外围区域中的主测试线,沿第二方向延伸并与数据电连接 线路,外围区域中的子测试线以及周边区域中的测试焊盘,并与主测试线和副测试线电连接。 开关元件与沿第一方向延伸的栅极线电连接,数据线沿与第一方向交叉的第二方向延伸。 子测试线与数据线电连接。 子测试线与主测试线不同。

    Liquid crystal display device
    9.
    发明授权

    公开(公告)号:US10133137B2

    公开(公告)日:2018-11-20

    申请号:US15268699

    申请日:2016-09-19

    摘要: A liquid crystal display device includes upper and lower pixels; gate lines in electrical connection with the adjacent pixels and extending in a row direction, and data lines which cross the gate lines; and a reference voltage line including a vertical portion which passes through the adjacent pixels, and horizontal portions which alternately extend from the vertical portion. Each of the adjacent pixels includes first and second thin film transistors (TFTs) each in electrical connection with a gate line and a data line which correspond to a respective pixel; and a pixel electrode including a first subpixel electrode in connection with an output terminal of the first TFT, and a second subpixel electrode in connection with an output terminal of the second TFT. The horizontal portions of the reference voltage line are in electrical connection with the second subpixel electrodes of the adjacent pixels.