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1.发明申请TRANSPARENT DISPLAY SUBSTRATES, TRANSPARENT DISPLAY DEVICES AND METHODS OF MANUFACTURING TRANSPARENT DISPLAY DEVICES 有权透明显示基板，透明显示装置和制造透明显示装置的方法公开(公告)号：US20160233289A1
公开(公告)日：2016-08-11
申请号：US15016241
申请日：2016-02-04
发明人： Yong-Duck SON , Ji-Youn LEE , Dae-Woo LEE , Jae Beom CHOI
CPC分类号： H01L27/3258 , H01L27/326 , H01L51/52 , H01L2251/558
摘要： A transparent display substrate including a base substrate having a pixel area and a transmission area, a thickness of the base substrate at the transmission area being less than a thickness of the base substrate at the pixel area, a pixel circuit at the pixel area of the base substrate, an insulation structure covering the pixel circuit, the insulation structure having an opening or a concave portion at the transmission area of the base substrate, and a pixel electrode at the pixel area of the base substrate and extending at least partially through the insulation structure to be electrically connected to the pixel circuit.
摘要翻译： 一种透明显示基板，包括具有像素区域和透射区域的基底基板，所述基底基板在所述透射区域处的厚度小于所述像素区域处的所述基板的厚度，所述像素区域处的像素电路 基底衬底，覆盖像素电路的绝缘结构，在基底衬底的透射区域具有开口或凹部的绝缘结构，以及在基底衬底的像素区域处的像素电极，并且至少部分延伸穿过绝缘体 结构电连接到像素电路。
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公开(公告)号：US20160181332A1
公开(公告)日：2016-06-23
申请号：US14690785
申请日：2015-04-20
发明人： Se Hun PARK , Yong Duck SON , Jae Hwan OH , Ji Youn LEE , Young Jin CHANG , Jae Beom CHOI
CPC分类号： H01L27/3246 , H01L27/3267 , H01L51/5271 , H01L2251/5323
摘要： A light emitting display device includes a substrate, a first electrode, a pixel defining layer, a light emitting layer, a second electrode, and a reflective pattern. The substrate includes a plurality of pixels, each including a top emission pixel in a first area and a bottom emission pixel in a second area. The first electrode is in the first area and the second area. The pixel defining layer includes pixel openings to expose the first electrode and reflective pattern openings between adjacent pixels. The light emitting layer is on the first electrode, and the second electrode is on the light emitting layer. The reflective pattern is in the reflective pattern opening and spaced from the second electrode in the first area.
摘要翻译： 发光显示装置包括基板，第一电极，像素限定层，发光层，第二电极和反射图案。 衬底包括多个像素，每个像素包括第一区域中的顶部发射像素和第二区域中的底部发射像素。 第一电极在第一区域和第二区域中。 像素限定层包括用于露出第一电极的像素开口和相邻像素之间的反射图案开口。 发光层位于第一电极上，第二电极位于发光层上。 反射图案处于反射图案开口中并且与第一区域中的第二电极间隔开。
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公开(公告)号：US20240331608A1
公开(公告)日：2024-10-03
申请号：US18732585
申请日：2024-06-03
发明人： Kang Nam KIM , Sung Hoon LIM , Woo Geun LEE , Kyu Sik CHO , Jae Beom CHOI
IPC分类号： G09G3/20 , G09G3/3233 , G09G3/3266
CPC分类号： G09G3/2092 , G09G3/3233 , G09G3/3266 , G09G2310/0202 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/08
摘要： A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
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公开(公告)号：US20220005402A1
公开(公告)日：2022-01-06
申请号：US17478825
申请日：2021-09-17
发明人： Kang Nam KIM , Sung Hoon LIM , Woo Geun LEE , Kyu Sik CHO , Jae Beom CHOI
IPC分类号： G09G3/20
摘要： A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
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公开(公告)号：US20200372851A1
公开(公告)日：2020-11-26
申请号：US16875682
申请日：2020-05-15
发明人： Kang Nam KIM , Sung Hoon LIM , Woo Geun LEE , Kyu Sik CHO , Jae Beom CHOI
IPC分类号： G09G3/20
摘要： A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
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公开(公告)号：US20230245612A1
公开(公告)日：2023-08-03
申请号：US18132704
申请日：2023-04-10
发明人： Kang Nam KIM , Sung Hoon LIM , Woo Geun LEE , Kyu Sik CHO , Jae Beom CHOI
IPC分类号： G09G3/20
CPC分类号： G09G3/2092 , G09G3/3266 , G09G2310/08 , G09G2310/0267 , G09G2310/0275
摘要： A scan driver includes a plurality of stages. An nth (n is a natural number) stage among the stages includes: a first and a second input circuit for controlling a voltage of a first node in response to a carry signal of a previous stage and a next stage, respectively; a first output circuit for outputting an nth carry signal corresponding to a carry clock signal in response to the voltage of the first node; a second output circuit for outputting an nth scan and an nth sensing signal corresponding to a scan and a sensing clock signal, respectively, in response to the voltage of the first node; and a sampling circuit for storing the carry signal of the previous stage in response to a first select signal, and for supplying a control voltage to the first node in response to a second select signal and the stored carry signal.
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公开(公告)号：US20220199742A1
公开(公告)日：2022-06-23
申请号：US17407407
申请日：2021-08-20
发明人： Young Jae JEON , Woo Geun LEE , Jae Beom CHOI , Jong-In KIM , Jin-Won LEE
摘要： A display device includes a semiconductor layer of a driving transistor; a semiconductor layer of a switching transistor; a semiconductor layer of an initialization transistor; a gate electrode of the driving transistor overlapping a semiconductor layer of the driving transistor; a lower storage electrode connected to the semiconductor layer of the switching transistor; an upper storage electrode connected to the semiconductor layer of the driving transistor, a light blocking pattern, and the semiconductor layer of the initialization transistor, and overlapping the lower storage electrode; a semiconductor layer of a first auxiliary transistor adjacent the semiconductor layer of the switching transistor and/or the semiconductor layer of the initialization transistor; a first electrode of the first auxiliary transistor connected to the semiconductor layer of the first auxiliary transistor; and a second electrode of the first auxiliary transistor connected to the semiconductor layer of the first auxiliary transistor.
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