Abstract:
A memory is provided, which comprises an electrically erasable and programmable read only memory (EEPROM) configured to store an operation system and to be rewritable in response to a write operation signal, an address comparator configured to be connected to Inter Integrated Circuit (I2C) lines and output the write operation signal to the EEPROM in response to an external signal, a digital-to-analog converter (DAC) unit configured to determine whether to connect a DAC resistor and the I2C lines in response to the external signal and a pull-up resistor unit configured to be connected to the I2C lines.
Abstract:
A display device includes a substrate having a display area and a non-display area. A plurality of pixels is disposed in the display area. A chip mount area is disposed on the non-display area. The chip mount area includes a data output pad unit, a lighting test transistor unit and a plurality of lines connecting the data output pad unit and the lighting test transistor unit. The lighting test transistor unit is configured to transfer at least one lighting test signal to the plurality of pixels through the data output pad unit. The resistances of each of the plurality of lines are the same.