公开(公告)号：US11152399B2

公开(公告)日：2021-10-19

申请号：US16453976

申请日：2019-06-26

Applicant: Samsung Display Co., Ltd.

Inventor： Yeon Keon Moon ,  Kano Masataka ,  Myoung Hwa Kim ,  Jun Hyung Lim

IPC: H01L27/12 ,  H01L29/786 ,  G09G3/36

Abstract: A display device in which a display area and a non-display area are defined, the display device including a wiring substrate, the wiring substrate including: a base substrate; a first thin film transistor disposed on the base substrate, located in the non-display area, and including a first gate pattern, a first semiconductor pattern disposed on the first gate pattern, a first source pattern disposed on the first semiconductor pattern, and a first drain pattern disposed on the first semiconductor pattern and spaced apart from the first source pattern; and a second thin film transistor disposed on the base substrate and located in the display area. A first channel width of the first thin film transistor is greater than a first overlap length of the first gate pattern, the first semiconductor pattern, and the first drain pattern.

公开(公告)号：US09136342B2

公开(公告)日：2015-09-15

申请号：US14495835

申请日：2014-09-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yeon Taek Jeong ,  Bo Sung Kim ,  Doo-Hyoung Lee ,  June Whan Choi ,  Tae-Young Choi ,  Kano Masataka

IPC: H01L29/76 ,  H01L29/423 ,  H01L29/51 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/42384 ,  H01L29/4908 ,  H01L29/51 ,  H01L29/512 ,  H01L29/786 ,  H01L2029/42388

Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.

Abstract translation: 提供薄膜晶体管。 根据本发明的示例性实施例的薄膜晶体管包括：基板; 栅极线，设置在所述基板上并且包括栅电极; 半导体层，设置在所述基板上，并且至少包括与所述栅电极重叠的部分; 设置在所述栅极线和所述半导体层之间的栅极绝缘层; 以及设置在所述基板上并且在所述半导体层的沟道区域上彼此面对的源电极和漏电极。 栅极绝缘层包括第一区域和第二区域，第一区域对应于半导体层的沟道区域，第一区域由第一材料制成，第二区域由第二材料制成，第一材料 并且第二材料具有不同的碳和硅原子数比。