公开(公告)号：US11968876B2

公开(公告)日：2024-04-23

申请号：US17283714

申请日：2019-02-01

Applicant: Samsung Display Co., Ltd.

Inventor： Kyungjin Jeon ,  Joon-seok Park ,  Kwang-suk Kim ,  Taesang Kim ,  Yeon-keon Moon ,  Geunchul Park ,  Jun-hyung Lim

IPC: H10K59/38 ,  H10K50/844 ,  H10K50/86 ,  H10K59/121 ,  H10K59/126 ,  H01L27/12 ,  H01L29/786

CPC classification number: H10K59/38 ,  H10K50/844 ,  H10K50/865 ,  H10K59/1213 ,  H10K59/126 ,  H01L27/1225 ,  H01L29/78633 ,  H01L29/7869

Abstract: A display device includes a base substrate including a first sub-pixel area, a second sub-pixel area, and a third sub-pixel area, first to third thin film transistors on the base substrate and including first to third active patterns, respectively, first to third pixel electrodes electrically connected to the first to third thin film transistors, respectively and in the first to third sub-pixel areas, respectively, a blue light emitting layer on the first to third pixel electrodes and configured to emit a blue light, a first color conversion pattern in the first sub-pixel area on the blue light emitting layer, a second color conversion pattern in the second sub-pixel area on the blue light emitting layer, and a red color filter layer between the blue light emitting layer and the first to third active patterns.

公开(公告)号：US11950455B2

公开(公告)日：2024-04-02

申请号：US17287936

申请日：2019-02-20

Applicant: Samsung Display Co., Ltd.

Inventor： Yeonkeon Moon ,  Joonseok Park ,  Kwang-suk Kim ,  Myounghwa Kim ,  Taesang Kim ,  Geunchul Park ,  Kyungjin Jeon

IPC: H01L29/786 ,  H01L27/12 ,  H10K59/121 ,  H10K59/131

CPC classification number: H10K59/1213 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696 ,  H10K59/131

Abstract: A transistor substrate may include a substrate including a first region and a second region, a first buffer layer disposed in the first region on the substrate and including silicon nitride, a second buffer layer disposed in the first region and the second region on the first buffer layer and including silicon oxide, a first transistor disposed in the first region on the second buffer layer and including a first oxide semiconductor layer and a first gate electrode overlapping the first oxide semiconductor layer, and a second transistor disposed in the second region on the second buffer layer and including a second oxide semiconductor layer and a second gate electrode overlapping the second oxide semiconductor layer.