公开(公告)号：US20130207921A1

公开(公告)日：2013-08-15

申请号：US13841870

申请日：2013-03-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sun-Kyu JOO ,  Ju-Hyeon BAEK ,  Ji-Young JEONG ,  Sung-Man KIM ,  Myung-Sub LEE

IPC: G06F3/041

CPC classification number: G06F3/0418 ,  G02F1/13338 ,  G02F1/13394 ,  G02F1/136259 ,  G02F2001/13396 ,  G02F2201/508 ,  G06F3/0412 ,  Y10T29/49105

Abstract: Provided are a display panel which can detect a touch position derived from a user's touch and can prevent erroneous touch position data from being generated even when an erroneous connection to a position sensing line is present due a processing deviation or a cell gap deviation, and a manufacturing method of the same. The display panel includes a first substrate, a first sensor pad that is formed on the first substrate, a second sensor pad that is spaced apart from the first sensor pad, a second substrate that is disposed to face the first substrate, a first sensor spacer that is formed on the second substrate to overlap the first sensor pad and protrudes toward the first substrate, a second sensor spacer that is formed on the second substrate to overlap the second sensor pad and protrudes toward the first substrate, and a sensor electrode that is formed on the first sensor spacer and the second sensor spacer to overlap the first sensor pad and the second sensor pad, wherein the second sensor spacer protrudes toward the first substrate more than the first sensor spacer does.

Abstract translation: 提供了一种显示面板，其可以检测从用户的触摸导出的触摸位置，并且即使当由于处理偏差或单元格间隙偏差而存在与位置感测线的错误连接时也可以防止错误的触摸位置数据，并且 制造方法相同。 显示面板包括第一基板，形成在第一基板上的第一传感器垫，与第一传感器垫间隔开的第二传感器垫，与第一基板相对设置的第二基板，第一传感器间隔件 形成在所述第二基板上以与所述第一传感器焊盘重叠并朝向所述第一基板突出的第二传感器间隔件，形成在所述第二基板上以与所述第二传感器焊盘重叠并朝向所述第一基板突出的第二传感器间隔件， 形成在所述第一传感器间隔物和所述第二传感器间隔物上以与所述第一传感器垫和所述第二传感器垫重叠，其中所述第二传感器间隔物比所述第一传感器间隔物更向第一基底突出。

公开(公告)号：US20160351158A1

公开(公告)日：2016-12-01

申请号：US15231246

申请日：2016-08-08

Applicant: Samsung Display Co., Ltd.

Inventor： Beom-Jun KIM ,  Myung-Koo HUR ,  Bong-Jun LEE ,  Yeon-Kyu MOON ,  Myung-Sub LEE ,  Gyu-Tae KIM

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/36 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2310/0251 ,  G09G2310/0291 ,  G09G2310/08 ,  G11C19/28 ,  H03K17/693

Abstract: A gate driving circuit including a plurality of stages connected with each other and configured to output a plurality of gate signals. An n-th (n is a natural number) stage including a gate output part including a first transistor connected between a clock signal and an output node outputting an n-th gate signal, the first transistor having a gate electrode connected to a control node, a carry part connected between the clock signal and a carry node outputting an n-th carry signal, a first node control part connected between the output node and a first low voltage, and a second node control part including at least one transistor connected between the control node and a second low voltage different from the first low voltage.

Abstract translation: 一种栅极驱动电路，包括彼此连接的多个级并且被配置为输出多个栅极信号。 第n（n是自然数）级，包括栅极输出部分，该栅极输出部分包括连接在时钟信号和输出第n个栅极信号的输出节点之间的第一晶体管，第一晶体管具有连接到控制节点 连接在时钟信号和输出第n个进位信号的进位节点之间的进位部分，连接在输出节点和第一低电压之间的第一节点控制部分和包括至少一个晶体管的第二节点控制部分， 控制节点和与第一低电压不同的第二低电压。