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公开(公告)号：US09504107B2
公开(公告)日：2016-11-22
申请号：US14614289
申请日：2015-02-04
Applicant: Samsung Display Co., Ltd.
Inventor： Woojin Lee , Yu-chol Kim , Yeong Won Kim
CPC classification number: H05B33/0815 , Y02B20/347
Abstract: A backlight unit includes a DC-DC converter that converts a first voltage to a second voltage in response to a driving pulse signal and a driving controller that outputs the driving pulse signal in response to an over-current control signal to control a reference voltage and a level of the second voltage. The driving controller controls the reference voltage in response to the over-current control signal such that the reference voltage increases prior to the second voltage by a predetermined time when the second voltage needs to be increased. In addition, the driving controller controls the reference voltage in response to the over-current control signal when the second voltage needs to be decreased such that the reference voltage decreases later than the second voltage by the predetermined time.
Abstract translation: 背光单元包括DC-DC转换器，其响应于驱动脉冲信号将第一电压转换为第二电压;以及驱动控制器，响应于过电流控制信号输出驱动脉冲信号以控制参考电压，以及 第二电压的电平。 驱动控制器响应于过电流控制信号控制参考电压，使得在第二电压需要增加时，参考电压在第二电压之前增加预定时间。 此外，当需要减小第二电压时，驱动控制器响应于过电流控制信号控制参考电压，使得参考电压在第二电压下降预定时间。
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2.发明申请公开(公告)号：US20170206847A1
公开(公告)日：2017-07-20
申请号：US15365292
申请日：2016-11-30
Applicant: Samsung Display Co., Ltd.
Inventor： Yoonsik Park , Kyunho Kim , Yu-chol Kim , Jongjae Lee , Jiye Lee , Youngsuk Jung , Hyehyun Jeong
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3648 , G09G3/3688 , G09G5/18 , G09G2310/08 , G09G2330/025 , G09G2330/04 , G09G2330/12
Abstract: A clock generation circuit includes: a clock generator to receive a gate pulse signal and to generate at least one gate clock signal corresponding to the gate pulse signal; an over-current protector to detect a current level of the at least one gate clock signal, and to output a shutdown enable signal and at least one switching signal corresponding to the detected current level; and a switching unit including at least one switching device to output the gate pulse signal as the at least one gate clock signal. The clock generator is to generate the at least one gate clock signal in response to the shutdown enable signal, and the at least one switching device is to transmit the gate pulse signal as the at least one gate clock signal in response to the at least one switching signal.
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公开(公告)号：US10650773B2
公开(公告)日：2020-05-12
申请号：US16201325
申请日：2018-11-27
Applicant: Samsung Display Co., Ltd.
Inventor： Kihyun Pyun , Yu-chol Kim , Minyoung Park , Min-soo Choi
Abstract: A display device includes a display panel, and a power management circuit including a switching regulator for supplying a power in a discontinuous conduction mode or in a continuous conduction mode, and a sensing circuit for sensing whether the switching regulator is operated in the discontinuous conduction mode, the switching regulator including a comparator for monitoring the supplied power, and an RS latch for receiving an output signal from the comparator, and the sensing circuit including a phase lock loop circuit for generating a first clock signal, a phase delay circuit for generating a second clock signal having a phase delayed from the first, and a determination circuit for outputting a first value when a pulse width of the output signal from the RS latch is small, and for outputting a second value when the pulse width of the output signal from the RS latch is not small.
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公开(公告)号：US10325564B2
公开(公告)日：2019-06-18
申请号：US15365292
申请日：2016-11-30
Applicant: Samsung Display Co., Ltd.
Inventor： Yoonsik Park , Kyunho Kim , Yu-chol Kim , Jongjae Lee , Jiye Lee , Youngsuk Jung , Hyehyun Jeong
IPC: G09G3/36
Abstract: A clock generation circuit includes: a clock generator to receive a gate pulse signal and to generate at least one gate clock signal corresponding to the gate pulse signal; an over-current protector to detect a current level of the at least one gate clock signal, and to output a shutdown enable signal and at least one switching signal corresponding to the detected current level; and a switching unit including at least one switching device to output the gate pulse signal as the at least one gate clock signal. The clock generator is to generate the at least one gate clock signal in response to the shutdown enable signal, and the at least one switching device is to transmit the gate pulse signal as the at least one gate clock signal in response to the at least one switching signal.
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