公开(公告)号：US20210383971A1

公开(公告)日：2021-12-09

申请号：US17407552

申请日：2021-08-20

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Cheol LEE

IPC: H01G4/012 ,  H01G4/224 ,  H01G4/30 ,  H01G4/232

Abstract: A multilayer ceramic capacitor includes a body including a first dielectric layer on which a first internal electrode, a first coupling portion, and a second internal electrode are disposed, a second dielectric layer on which a third internal electrode, a second coupling portion, and a fourth internal electrode are disposed, and a third dielectric layer on which a fifth internal electrode or a sixth internal electrode is disposed, and first and second external electrodes connected to the first to sixth internal electrodes, and disposed on both surfaces of the body in the first direction. The first to third dielectric layers are sequentially stacked.

公开(公告)号：US20160099105A1

公开(公告)日：2016-04-07

申请号：US14663412

申请日：2015-03-19

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Cheol LEE ,  Hyoung Wook LIM ,  Mi Ok PARK ,  Jae Yeol CHOI ,  Ji Hee MOON

IPC: H01G4/005 ,  H01G4/248 ,  H01G4/12 ,  H01G2/06 ,  H01G4/30

CPC classification number: H01G4/30 ,  H01G2/065 ,  H01G4/012 ,  H01G4/1227 ,  H01G4/232

Abstract: A multilayer ceramic electronic component includes: a ceramic body including dielectric layers; an active part including first and second internal electrodes which are exposed to both end surfaces of the ceramic body in a length direction thereof, and floating electrodes which are partially overlapped with the first and second internal electrodes; upper and lower cover parts including the dielectric layers and disposed above and below the active part; dummy electrodes disposed in the upper and lower cover parts to be overlapped with the floating electrodes; and first and second external electrodes.

Abstract translation: 多层陶瓷电子部件包括：陶瓷体，包括电介质层; 包括暴露于陶瓷体的长度方向的两端面的第一和第二内部电极的活性部分和与第一和第二内部电极部分重叠的浮动电极; 上盖部分和下盖部分包括电介质层并且设置在有效部分的上方和下方; 设置在上盖部分和下盖部分中以与浮动电极重叠的虚拟电极; 以及第一和第二外部电极。

公开(公告)号：US20140083755A1

公开(公告)日：2014-03-27

申请号：US13713747

申请日：2012-12-13

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Cheol LEE ,  Woo Sup KIM ,  Dong Gun KIM ,  Kyeong Jun KIM ,  Kyu Ho LEE

IPC: H05K1/18 ,  H05K1/03 ,  H01C7/00 ,  H01L41/083 ,  H01G4/12 ,  H01C7/10

CPC classification number: H05K1/181 ,  H01C7/008 ,  H01C7/10 ,  H01G2/06 ,  H01G2/24 ,  H01G4/06 ,  H01G4/12 ,  H01G4/30 ,  H01L41/083 ,  H05K1/0306 ,  Y02P70/611

Abstract: A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer.

Abstract translation: 层叠芯片电子部件包括：陶瓷体，其包括内部电极和电介质层; 形成为在长度方向上覆盖陶瓷体的两端部的外部电极; 其中内部电极以相对的方式设置在其间插入电介质层的有源层以形成电容; 以及在有源层的厚度方向的上部和下部形成的上部和下部覆盖层，所述下部覆盖层的厚度大于上部覆盖层的厚度。

公开(公告)号：US20160099107A1

公开(公告)日：2016-04-07

申请号：US14662201

申请日：2015-03-18

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Cheol LEE ,  Min Hyang KIM ,  Seung Yul LEE ,  Kyeong Jun KIM ,  Jang Hyun LEE

IPC: H01G4/012 ,  H01G2/06 ,  H01G4/30 ,  H01G4/12 ,  H01G4/248

CPC classification number: H01G4/012 ,  H01G2/065 ,  H01G4/1227 ,  H01G4/232 ,  H01G4/30

Abstract: A multilayer ceramic electronic component may includes: a ceramic body including dielectric layers; an active layer including first and second internal electrodes disposed to be exposed to both end surfaces of the ceramic body in a length direction of the ceramic body, respectively, first floating electrodes overlapping the first and second internal electrodes while being spaced apart from each other in the thickness direction of the ceramic body, second floating electrodes each disposed to be spaced apart from the first and second internal electrodes, and first and second dummy electrodes disposed to be spaced apart from the first floating electrodes; upper and lower cover layers disposed upwardly and downwardly of the active layer, respectively; third and fourth dummy electrodes disposed to be exposed to both end surfaces of the ceramic body in the length direction of the ceramic body, respectively; and fifth dummy electrodes.

Abstract translation: 多层陶瓷电子部件可以包括：包括电介质层的陶瓷体; 活性层，包括第一和第二内部电极，分别设置成在陶瓷体的长度方向上暴露于陶瓷体的两个端面，第一浮动电极与第一和第二内部电极重叠，同时彼此间隔开 陶瓷体的厚度方向，与第一和第二内部电极间隔开的第二浮置电极，以及与第一浮置电极间隔开地配置的第一和第二虚拟电极; 上层和下层分别设置在活性层的上下方向上; 第三和第四虚拟电极分别设置成在陶瓷体的长度方向上暴露于陶瓷体的两个端面; 和第五虚拟电极。

公开(公告)号：US20150114701A1

公开(公告)日：2015-04-30

申请号：US14262345

申请日：2014-04-25

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Hae Sock CHUNG ,  Doo Young KIM ,  Chang Hoon KIM ,  Sun Cheol LEE ,  Jong Hyun YOON ,  Ki Won KIM

IPC: H01G4/12 ,  H01G2/06

CPC classification number: H01G4/12 ,  H01G2/065 ,  H01G4/1227 ,  H01G4/224 ,  H01G4/30

Abstract: A multilayer ceramic capacitor may include a ceramic body including dielectric layers, first and second internal electrodes disposed in the ceramic body to face each other, the dielectric layer being interposed between the first and second internal electrodes, and first and second external electrodes covering both end surfaces of the ceramic body. The ceramic body may include an active layer as a capacitance forming part and a cover layer as a non-capacitive part disposed on at least one surface of upper and lower surfaces of the active layer, the cover layer including at least one buffer layer, and when a thickness of the cover layer is defined as tc, and a thickness of the buffer layer is defined as ti, ti/tc being in a range of 0.15 to 0.90 (0.15≦ti/tc≦0.90).

Abstract translation: 多层陶瓷电容器可以包括：陶瓷体，其包括电介质层，设置在陶瓷体中的第一和第二内部电极相互面对，介电层插入在第一和第二内部电极之间，第一和第二外部电极覆盖两端 陶瓷体的表面。 陶瓷体可以包括作为电容形成部分的有源层和作为设置在有源层的上表面和下表面的至少一个表面上的非电容部分的覆盖层，覆盖层包括至少一个缓冲层，以及 当覆盖层的厚度定义为tc，缓冲层的厚度定义为ti时，ti / tc在0.15〜0.90（0.15＆nlE; ti / tc＆nlE; 0.90）的范围内。

公开(公告)号：US20210082620A1

公开(公告)日：2021-03-18

申请号：US16690435

申请日：2019-11-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Cheol LEE

IPC: H01G4/012 ,  H01G4/30 ,  H01G4/12 ,  H01G4/232

Abstract: A multilayer electronic component includes a body comprising dielectric layers, and first and second internal electrode layers alternately stacked in a stacking direction with respective dielectric layers interposed therebetween. The first internal electrode layer includes first and second internal electrodes arranged with a first spacer interposed therebetween, and the second internal electrode layer includes third and fourth internal electrodes arranged with a second spacer interposed therebetween.

公开(公告)号：US20210043379A1

公开(公告)日：2021-02-11

申请号：US16690410

申请日：2019-11-21

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Cheol LEE

IPC: H01G4/012 ,  H01G4/232 ,  H01G4/30 ,  H01G4/224

Abstract: A multilayer ceramic capacitor includes a body including a first dielectric layer on which a first internal electrode, a first coupling portion, and a second internal electrode are disposed, a second dielectric layer on which a third internal electrode, a second coupling portion, and a fourth internal electrode are disposed, and a third dielectric layer on which a fifth internal electrode or a sixth internal electrode is disposed, and first and second external electrodes connected to the first to sixth internal electrodes, and disposed on both surfaces of the body in the first direction. The first to third dielectric layers are sequentially stacked.

公开(公告)号：US20160111216A1

公开(公告)日：2016-04-21

申请号：US14677639

申请日：2015-04-02

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sun Cheol LEE ,  Seung Yul LEE ,  Bok Goo HEO ,  Kyung Pyo HONG ,  Min Hyang KIM ,  Kyoung Hoon KIM ,  Hyoung Wook LIM ,  Sang Hyun PARK ,  Mi Ok PARK

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/224

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/1227 ,  H01G4/232

Abstract: A chip component includes: a ceramic body including a capacitance forming part in which first and second dielectric layers are alternately disposed; and external electrodes disposed on both end surfaces of the ceramic body, wherein the capacitance forming part includes first and second internal electrodes spaced apart from each other on the first dielectric layers and exposed to the end surfaces of the ceramic body to thereby be connected to the external electrodes; and floating electrodes disposed on the second dielectric layers and overlapped with portions of the first and second internal electrodes, the ceramic body includes protective parts disposed between upper and lower surfaces thereof and the capacitance forming part and having third dielectric layers on which first and second dummy electrodes exposed to the end surfaces of the ceramic body are disposed, and the protective parts include third dummy electrodes disposed between the first and second dummy electrodes.

Abstract translation: 芯片部件包括：陶瓷体，包括电容形成部，其中第一和第二电介质层交替设置; 以及设置在陶瓷体的两端面的外部电极，其中电容形成部分包括在第一电介质层上彼此间隔开并暴露于陶瓷体的端面的第一和第二内部电极，从而与陶瓷体的端面连接 外部电极; 以及布置在所述第二电介质层上且与所述第一和第二内部电极的部分重叠的浮动电极，所述陶瓷体包括设置在所述第一和第二内部电极的上表面和下表面之间的保护部分和所述电容形成部分，并且具有第三电介质层， 布置暴露于陶瓷体的端面的电极，保护部分包括设置在第一和第二虚拟电极之间的第三虚拟电极。