INTEGRATED CIRCUITS INCLUDING MULTI-LAYER CONDUCTING LINES

    公开(公告)号:US20210202373A1

    公开(公告)日:2021-07-01

    申请号:US17197280

    申请日:2021-03-10

    摘要: An integrated circuit includes a plurality of layers stacked in a first direction, a plurality of unit circuits at least partially overlapping each other in a second direction that is perpendicular to the first direction and configured to operate in parallel with one another, control circuitry configured to generate a control signal to control the plurality of unit circuits, and a multi-layer conducting line configured to transfer the control signal from the control circuitry to the plurality of unit circuits. The multi-layer conducting line may be integrally formed in a wiring layer and a via layer and extends in the second direction. The wiring layer and the via layer may be adjacent to each other.

    METHOD AND APPARATUS FOR MANAGING DATA
    3.
    发明申请
    METHOD AND APPARATUS FOR MANAGING DATA 审中-公开
    用于管理数据的方法和装置

    公开(公告)号:US20150379098A1

    公开(公告)日:2015-12-31

    申请号:US14749937

    申请日:2015-06-25

    IPC分类号: G06F17/30

    摘要: A method is provided for managing data in an electronic device, the method including: detecting a request for tagging a data record; selecting a portion of the data record in response to the request; identifying a content item based on the selected portion of the data record; and associating the content item with the data record.

    摘要翻译: 提供了一种用于管理电子设备中的数据的方法,所述方法包括:检测对数据记录进行标记的请求; 响应于该请求选择数据记录的一部分; 基于所选择的数据记录部分来识别内容项; 并将内容项与数据记录相关联。

    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
    4.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME 审中-公开
    半导体封装及其制造方法

    公开(公告)号:US20160005707A1

    公开(公告)日:2016-01-07

    申请号:US14754686

    申请日:2015-06-29

    IPC分类号: H01L23/00

    摘要: A semiconductor package includes a package board that includes an circuit pattern and a plurality of contact pads electrically connected to the circuit pattern; a semiconductor chip having a plurality of chip pads; and a bump structure including a plurality of connecting bumps electrically connected with the semiconductor chip and the circuit pattern and a plurality of gap adjusting bumps bonded to the semiconductor chip and shaped into a slender bar between the semiconductor chip and the package board, the gap adjusting bumps spacing the semiconductor chip from the package board such that a gap space, S, is maintained between the package board and the semiconductor chip. A method of fabrication and a memory unit are disclosed.

    摘要翻译: 半导体封装包括封装板,其包括电路图案和电连接到电路图案的多个接触焊盘; 具有多个芯片焊盘的半导体芯片; 以及包括与所述半导体芯片和所述电路图案电连接的多个连接凸块的多个凸块结构以及与所述半导体芯片接合并成形为半导体芯片和所述封装板之间的细长棒的多个间隙调整凸块,所述间隙调整 凸块将半导体芯片与封装板间隔开,从而在封装板和半导体芯片之间保持间隙空间S. 公开了一种制造方法和存储单元。

    SCAN CHAIN CIRCUIT AND INTEGRATED CIRCUIT INCLUDING THE SAME
    5.
    发明申请
    SCAN CHAIN CIRCUIT AND INTEGRATED CIRCUIT INCLUDING THE SAME 有权
    扫描链电路和集成电路,包括它们

    公开(公告)号:US20160003901A1

    公开(公告)日:2016-01-07

    申请号:US14706224

    申请日:2015-05-07

    摘要: A scan chain circuit includes first through N-th flip-flops connected in series to sequentially transfer data in response to a control signal, where N is an integer greater than 1. In the first through N-th flip-flops, the data are transferred in a first direction from the first flip-flop to the N-th flip-flop. The control signal is applied to the first through N-th flip-flops in a second direction opposite to the first direction from the N-th flip-flop to the first flip-flop.

    摘要翻译: 扫描链电路包括串联连接的第一到第N触发器,以响应于控制信号顺序传送数据,其中N是大于1的整数。在第一至第N触发器中,数据是 在第一方向从第一触发器转移到第N触发器。 控制信号以与从第N触发器到第一触发器的第一方向相反的第二方向施加到第一至第N触发器。