公开(公告)号：US20160111538A1

公开(公告)日：2016-04-21

申请号：US14969702

申请日：2015-12-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghyun Roh ,  Pankwi Park ,  Dongsuk Shin ,  Chulwoong Lee ,  Naein Lee

IPC: H01L29/78 ,  H01L29/165 ,  H01L29/161

CPC classification number: H01L29/7849 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/161 ,  H01L29/165 ,  H01L29/42376 ,  H01L29/66477 ,  H01L29/66553 ,  H01L29/7848

Abstract: According to embodiments of the inventive concept, a gate electrode is formed on a substrate, and a first spacer, a second spacer, and a third spacer are sequentially formed on a sidewall of the gate electrode. The substrate is etched to form a recess region. A compressive stress pattern is formed in the recess region. A protective spacer is formed on a sidewall of the third spacer. When the recess region is formed, a lower portion of the second spacer is removed to form a gap region between the first and third spacers. The protective spacer fills the gap region.

Abstract translation: 根据本发明构思的实施例，栅极形成在衬底上，并且第一间隔物，第二间隔物和第三间隔物依次形成在栅电极的侧壁上。 蚀刻衬底以形成凹陷区域。 在凹部形成压缩应力图形。 在第三间隔件的侧壁上形成保护隔离件。 当形成凹陷区域时，去除第二间隔物的下部以在第一和第三间隔物之间​​形成间隙区域。 保护性间隔物填充间隙区域。

公开(公告)号：US09252235B2

公开(公告)日：2016-02-02

申请号：US13957912

申请日：2013-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghyun Roh ,  Pankwi Park ,  Dongsuk Shin ,  Chulwoong Lee ,  Naein Lee

IPC: H01L21/76 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L29/7849 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/161 ,  H01L29/165 ,  H01L29/42376 ,  H01L29/66477 ,  H01L29/66553 ,  H01L29/7848

Abstract: According to embodiments of the inventive concept, a gate electrode is formed on a substrate, and a first spacer, a second spacer, and a third spacer are sequentially formed on a sidewall of the gate electrode. The substrate is etched to form a recess region. A compressive stress pattern is formed in the recess region. A protective spacer is formed on a sidewall of the third spacer. When the recess region is formed, a lower portion of the second spacer is removed to form a gap region between the first and third spacers. The protective spacer fills the gap region.

Abstract translation: 根据本发明构思的实施例，栅极形成在衬底上，并且第一间隔物，第二间隔物和第三间隔物依次形成在栅电极的侧壁上。 蚀刻衬底以形成凹陷区域。 在凹部形成压缩应力图形。 在第三间隔件的侧壁上形成保护隔离件。 当形成凹陷区域时，去除第二间隔物的下部，以在第一和第三间隔物之间​​形成间隙区域。 保护性间隔物填充间隙区域。

公开(公告)号：US10181525B2

公开(公告)日：2019-01-15

申请号：US15374093

申请日：2016-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghyun Roh ,  Pankwi Park ,  Dongsuk Shin ,  Chulwoong Lee ,  Nae-in Lee

IPC: H01L29/78 ,  H01L21/306 ,  H01L29/66 ,  H01L29/423 ,  H01L29/06 ,  H01L21/762 ,  H01L29/165 ,  H01L21/8234 ,  H01L29/161

Abstract: According to embodiments of the inventive concept, a gate electrode is formed on a substrate, and a first spacer, a second spacer, and a third spacer are sequentially formed on a sidewall of the gate electrode. The substrate is etched to form a recess region. A compressive stress pattern is formed in the recess region. A protective spacer is formed on a sidewall of the third spacer. When the recess region is formed, a lower portion of the second spacer is removed to form a gap region between the first and third spacers. The protective spacer fills the gap region.

公开(公告)号：US20170092769A1

公开(公告)日：2017-03-30

申请号：US15374093

申请日：2016-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghyun Roh ,  Pankwi Park ,  Dongsuk Shin ,  Chulwoong Lee ,  Naein Lee

IPC: H01L29/78 ,  H01L21/762 ,  H01L21/306 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/7849 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/161 ,  H01L29/165 ,  H01L29/42376 ,  H01L29/66477 ,  H01L29/66553 ,  H01L29/7848

Abstract: According to embodiments of the inventive concept, a gate electrode is formed on a substrate, and a first spacer, a second spacer, and a third spacer are sequentially formed on a sidewall of the gate electrode. The substrate is etched to form a recess region. A compressive stress pattern is formed in the recess region. A protective spacer is formed on a sidewall of the third spacer. When the recess region is formed, a lower portion of the second spacer is removed to form a gap region between the first and third spacers. The protective spacer fills the gap region.

公开(公告)号：US11789133B2

公开(公告)日：2023-10-17

申请号：US16829467

申请日：2020-03-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Muncheon Kang ,  Kwanghyuk Bae ,  Hayoung Ko ,  Duckchan Seo ,  Chulwoong Lee

IPC: G01S17/08 ,  G01S7/48 ,  G01S7/497

CPC classification number: G01S7/497 ,  G01S7/4808 ,  G01S17/08

Abstract: A method of calibrating errors in a time-of-flight (ToF) sensor includes illuminating a test object with a transmission light that is modulated based on a modulation signal; generating, using a buffer chain circuit, a plurality of demodulation signals having different local delay phases; providing a plurality of measured phase differences by providing the plurality of demodulation signals to a plurality of pixel groups included in a ToF sensor to sample a reception light reflected from the test object based on the plurality of demodulation signals; determining a wiggling error based on the plurality of measured phase differences, the wiggling error depending on a phase difference between the transmission light and the reception light; and calibrating a measured distance from the ToF sensor to a target object based on the wiggling error.

公开(公告)号：US09548389B2

公开(公告)日：2017-01-17

申请号：US14969702

申请日：2015-12-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghyun Roh ,  Pankwi Park ,  Dongsuk Shin ,  Chulwoong Lee ,  Naein Lee

IPC: H01L27/092 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/161 ,  H01L29/165

CPC classification number: H01L29/7849 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/161 ,  H01L29/165 ,  H01L29/42376 ,  H01L29/66477 ,  H01L29/66553 ,  H01L29/7848

Abstract: According to embodiments of the inventive concept, a gate electrode is formed on a substrate, and a first spacer, a second spacer, and a third spacer are sequentially formed on a sidewall of the gate electrode. The substrate is etched to form a recess region. A compressive stress pattern is formed in the recess region. A protective spacer is formed on a sidewall of the third spacer. When the recess region is formed, a lower portion of the second spacer is removed to form a gap region between the first and third spacers. The protective spacer fills the gap region.

Abstract translation: 根据本发明构思的实施例，栅极形成在衬底上，并且第一间隔物，第二间隔物和第三间隔物依次形成在栅电极的侧壁上。 蚀刻衬底以形成凹陷区域。 在凹部形成压缩应力图形。 在第三间隔件的侧壁上形成保护隔离件。 当形成凹陷区域时，去除第二间隔物的下部以在第一和第三间隔物之间​​形成间隙区域。 保护性间隔物填充间隙区域。

公开(公告)号：US20140087535A1

公开(公告)日：2014-03-27

申请号：US13957912

申请日：2013-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donghyun Roh ,  Pankwi Park ,  Dongsuk Shin ,  Chulwoong Lee ,  Naein Lee

IPC: H01L29/66

CPC classification number: H01L29/7849 ,  H01L21/30604 ,  H01L21/76224 ,  H01L21/823412 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/0649 ,  H01L29/161 ,  H01L29/165 ,  H01L29/42376 ,  H01L29/66477 ,  H01L29/66553 ,  H01L29/7848

Abstract: According to embodiments of the inventive concept, a gate electrode is formed on a substrate, and a first spacer, a second spacer, and a third spacer are sequentially formed on a sidewall of the gate electrode. The substrate is etched to form a recess region. A compressive stress pattern is formed in the recess region. A protective spacer is formed on a sidewall of the third spacer. When the recess region is formed, a lower portion of the second spacer is removed to form a gap region between the first and third spacers. The protective spacer fills the gap region.

Abstract translation: 根据本发明构思的实施例，栅极形成在衬底上，并且第一间隔物，第二间隔物和第三间隔物依次形成在栅电极的侧壁上。 蚀刻衬底以形成凹陷区域。 在凹部形成压缩应力图形。 在第三间隔件的侧壁上形成保护隔离件。 当形成凹陷区域时，去除第二间隔物的下部，以在第一和第三间隔物之间​​形成间隙区域。 保护性间隔物填充间隙区域。