公开(公告)号：US20220254650A1

公开(公告)日：2022-08-11

申请号：US17517304

申请日：2021-11-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do Young CHOI ,  Sung Min KIM ,  Cheol KIM ,  Hyo Jin KIM ,  Dae Won HA ,  Dong Woo HAN

IPC: H01L21/3213 ,  H01L21/308

Abstract: Provided is a semiconductor device. The semiconductor device comprises a first active pattern extending in a first direction on a substrate, a second active pattern which extends in the first direction and is adjacent to the first active pattern in a second direction different from the first direction, a field insulating film placed between the first active pattern and the second active pattern, a first gate structure which crosses the first active pattern, extends in the second direction, and includes a first gate electrode and a first gate spacer, a second gate structure which crosses the second active pattern, extends in the second direction, and includes a second gate electrode and a second gate spacer, a gate separation structure placed on the field insulating film between the first gate structure and the second gate structure.

公开(公告)号：US20230282640A1

公开(公告)日：2023-09-07

申请号：US18079209

申请日：2022-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Gun YOU ,  Sug Hyun SUNG ,  Dong Woo HAN

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L27/088 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775

Abstract: A semiconductor device comprising a first active pattern including a first lower pattern, and a plurality of first sheet patterns, a plurality of first gate structures on the first lower pattern, a second active pattern including a second lower pattern and a plurality of second sheet patterns, a plurality of second gate structures on the second lower pattern, a first source/drain recess between adjacent first gate structures, a second source/drain recess between adjacent second gate structures, first and second source/drain patterns in the first and second source/drain recesses, respectively, wherein a depth from an upper surface of the first lower pattern to a lowermost part of the first source/drain pattern is smaller than a depth from an upper surface of the second lower pattern to a lowermost part of the second source/drain pattern, and the first and second source/drain patterns include impurities of same conductive type.