公开(公告)号：US20200234966A1

公开(公告)日：2020-07-23

申请号：US16540726

申请日：2019-08-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chong Kwang Chang ,  Dong Hoon KHANG ,  Sug Hyun SUNG ,  Min Hwan JEON

IPC: H01L21/308 ,  H01L21/8234 ,  H01L29/66

Abstract: A method of fabricating a semiconductor device is provided. The method includes: forming mask patterns on a substrate, the mask patterns including a first mask fin pattern, a second mask fin pattern and a dummy mask pattern between the first mask fin pattern and the second mask fin pattern; forming a first fin pattern, a second fin pattern and a dummy fin pattern by etching the substrate using the mask patterns; and removing the dummy fin pattern, wherein the dummy mask pattern is wider than each of the first mask fin pattern and the second mask fin pattern.

公开(公告)号：US20170263722A1

公开(公告)日：2017-09-14

申请号：US15408815

申请日：2017-01-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Gi Gwan PARK ,  Sug Hyun SUNG ,  Myung Yoon UM ,  Dong Suk SHIN

IPC: H01L29/417 ,  H01L27/088 ,  H01L29/78

CPC classification number: H01L29/41791 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/775 ,  H01L29/7848

Abstract: A semiconductor device includes a first gate electrode on a substrate, a first trench on a first side of the first gate electrode, a second trench on a second side of the first gate electrode, a depth of the second trench being greater than a depth of the first trench, a first source/drain filling the first trench, and a second source/drain filling the second trench, a height of an upper surface of the second source/drain being greater than a height of the first source/drain.

公开(公告)号：US20230282640A1

公开(公告)日：2023-09-07

申请号：US18079209

申请日：2022-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Gun YOU ,  Sug Hyun SUNG ,  Dong Woo HAN

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775

CPC classification number: H01L27/088 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775

Abstract: A semiconductor device comprising a first active pattern including a first lower pattern, and a plurality of first sheet patterns, a plurality of first gate structures on the first lower pattern, a second active pattern including a second lower pattern and a plurality of second sheet patterns, a plurality of second gate structures on the second lower pattern, a first source/drain recess between adjacent first gate structures, a second source/drain recess between adjacent second gate structures, first and second source/drain patterns in the first and second source/drain recesses, respectively, wherein a depth from an upper surface of the first lower pattern to a lowermost part of the first source/drain pattern is smaller than a depth from an upper surface of the second lower pattern to a lowermost part of the second source/drain pattern, and the first and second source/drain patterns include impurities of same conductive type.

公开(公告)号：US20210118746A1

公开(公告)日：2021-04-22

申请号：US17134710

申请日：2020-12-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan PARK ,  Jung Gun YOU ,  Ki Il KIM ,  Sug Hyun SUNG ,  Myung Yoon UM

IPC: H01L21/8238 ,  H01L21/762 ,  H01L29/66 ,  H01L27/092 ,  H01L21/8234 ,  H01L29/78

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US20170194426A1

公开(公告)日：2017-07-06

申请号：US15292515

申请日：2016-10-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung Seok MIN ,  Mi Gyeong GWON ,  Seong Jin NAM ,  Sug Hyun SUNG ,  Young Hoon SONG ,  Young Mook OH

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/762 ,  H01L29/161 ,  H01L29/16 ,  H01L29/165 ,  H01L29/78 ,  H01L29/08

CPC classification number: H01L29/0653 ,  H01J37/32192 ,  H01L21/31116 ,  H01L21/76224 ,  H01L21/76232 ,  H01L21/823431 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/7851 ,  H01L29/7853

Abstract: Semiconductor devices are provided. The semiconductor device includes a first fin and a second fin on a substrate and a field insulation layer between the first fin and the second fin. The field insulation layer include a first insulation layer and a second insulation layer on the first insulation layer and connected to the first insulation layer. The second insulation layer is wider than the first insulation layer. A ratio of a top width to a bottom width of each of the first fin and the second fin exceeds 0.5.

公开(公告)号：US20240237325A9

公开(公告)日：2024-07-11

申请号：US18212817

申请日：2023-06-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Sug Hyun SUNG

IPC: H10B10/00 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775

CPC classification number: H10B10/125 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775 ,  H10B10/18 ,  H01L2029/42388

Abstract: A semiconductor device includes a substrate including first and second regions; a first active pattern including a first lower pattern and first sheet patterns; a second active pattern including a second lower pattern, a height of the second lower pattern being identical to a height of the first lower pattern, and second sheet patterns; a first gate structure including a first gate insulating film and a first gate electrode; a second gate structure including a second gate insulating film, and a second gate electrode, a width of the second gate electrode being greater than a width of the first gate electrode; a first source/drain pattern on the first lower pattern and connected to the first sheet patterns; and a second source/drain pattern on the second lower pattern and connected to the second sheet patterns, wherein a number of first sheet patterns is smaller than a number of second sheet patterns.

公开(公告)号：US20240138137A1

公开(公告)日：2024-04-25

申请号：US18212817

申请日：2023-06-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Gun YOU ,  Sug Hyun SUNG

IPC: H10B10/00 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775

CPC classification number: H10B10/125 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42392 ,  H01L29/775 ,  H10B10/18 ,  H01L2029/42388

Abstract: A semiconductor device includes a substrate including first and second regions; a first active pattern including a first lower pattern and first sheet patterns; a second active pattern including a second lower pattern, a height of the second lower pattern being identical to a height of the first lower pattern, and second sheet patterns; a first gate structure including a first gate insulating film and a first gate electrode; a second gate structure including a second gate insulating film, and a second gate electrode, a width of the second gate electrode being greater than a width of the first gate electrode; a first source/drain pattern on the first lower pattern and connected to the first sheet patterns; and a second source/drain pattern on the second lower pattern and connected to the second sheet patterns, wherein a number of first sheet patterns is smaller than a number of second sheet patterns.

公开(公告)号：US20230187439A1

公开(公告)日：2023-06-15

申请号：US17957654

申请日：2022-09-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Gun YOU ,  Sug Hyun SUNG ,  Chan Kyo PARK ,  Seung Chul OH

IPC: H01L27/088 ,  H01L29/423 ,  H01L29/786 ,  H01L29/06

CPC classification number: H01L27/088 ,  H01L29/42392 ,  H01L29/78696 ,  H01L29/0673

Abstract: There is provided a semiconductor device capable of improving the performance and reliability of a device. The semiconductor device comprising, a first active pattern on a substrate, the first active pattern including a first lower pattern, which extends in a first direction, and first sheet patterns, which are on the first lower pattern, a second active pattern on the substrate, the second active pattern including a second lower pattern, which is spaced apart from the first lower pattern in a second direction and a second sheet patterns, which are on the second lower pattern, wherein the first lower pattern and the second lower pattern is separated by a fin trench.

公开(公告)号：US20200043807A1

公开(公告)日：2020-02-06

申请号：US16599313

申请日：2019-10-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gi Gwan PARK ,  Jung Gun YOU ,  Ki Il KIM ,  Sug Hyun SUNG ,  Myung Yoon UM

IPC: H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/78

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.

公开(公告)号：US20170221769A1

公开(公告)日：2017-08-03

申请号：US15292790

申请日：2016-10-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： GI GWAN PARK ,  Jung Gun YOU ,  Ki ll KIM ,  Sug Hyun SUNG ,  Myung Yoon UM

IPC: H01L21/8238 ,  H01L21/02 ,  H01L29/06 ,  H01L29/66 ,  H01L21/311 ,  H01L27/092 ,  H01L21/762 ,  H01L21/308

CPC classification number: H01L21/823821 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823481 ,  H01L21/823828 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7848

Abstract: A method of manufacturing a semiconductor device includes forming a first fin-type pattern and a second fin-type pattern which are separated by a first trench between facing ends thereof, forming a first insulating layer filling the first trench, removing a portion of the first insulating layer to form a second trench on the first insulating layer, and forming a third trench by enlarging a width of the second trench.