公开(公告)号：US10916509B2

公开(公告)日：2021-02-09

申请号：US16530993

申请日：2019-08-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Rae Cho ,  Sundae Kim ,  Hyunggil Baek ,  Namgyu Baek ,  Seunghun Shin ,  Donghoon Won

IPC: H01L21/78 ,  H01L23/00 ,  H01L21/02 ,  H01L23/58

Abstract: A method of dividing a substrate includes preparing a substrate including a crystalline semiconductor layer having a scribe lane region and device regions, a dielectric layer on the crystalline semiconductor layer, and a partition structure in physical contact with the dielectric layer and provided on the scribe lane region of the crystalline semiconductor layer, forming an amorphous region in the crystalline semiconductor layer, and performing a grinding process on the crystalline semiconductor layer after the forming of the amorphous region. The amorphous region is formed in the scribe lane region of the crystalline semiconductor layer.

公开(公告)号：US11469180B2

公开(公告)日：2022-10-11

申请号：US16886444

申请日：2020-05-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyeong Heo ,  Unbyoung Kang ,  Donghoon Won

IPC: H01L23/528 ,  H01L23/58 ,  H01L23/48 ,  H01L21/78 ,  H01L21/3065

Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, and a side surface between the first and second surfaces, and including a device region on the first surface a wiring structure on the surface of the semiconductor substrate, and having a dielectric layer and a metal wiring in the dielectric layer and electrically connected to the device region, and an insulating material layer on a side surface of the wiring structure and having a side surface connected to the side surface of the semiconductor substrate. The side surface of the insulating material layer has a first wave-shaped pattern in which concave-convex portions are repeated in a direction of the wiring structure that is perpendicular to the semiconductor substrate, and the side surface of the semiconductor substrate has a second wave-shaped pattern in which concave-convex portions are repeated in the direction.

公开(公告)号：US11935832B2

公开(公告)日：2024-03-19

申请号：US17938344

申请日：2022-10-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyeong Heo ,  Unbyoung Kang ,  Donghoon Won

IPC: H01L23/528 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/76 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/48 ,  H01L23/485

CPC classification number: H01L23/5283 ,  H01L21/3065 ,  H01L21/78 ,  H01L23/481

Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, and a side surface between the first and second surfaces, and including a device region on the first surface a wiring structure on the surface of the semiconductor substrate, and having a dielectric layer and a metal wiring in the dielectric layer and electrically connected to the device region, and an insulating material layer on a side surface of the wiring structure and having a side surface connected to the side surface of the semiconductor substrate. The side surface of the insulating material layer has a first wave-shaped pattern in which concave-convex portions are repeated in a direction of the wiring structure that is perpendicular to the semiconductor substrate, and the side surface of the semiconductor substrate has a second wave-shaped pattern in which concave-convex portions are repeated in the direction.

公开(公告)号：US11721669B2

公开(公告)日：2023-08-08

申请号：US16877169

申请日：2020-05-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyeong Heo ,  Jae-Eun Lee ,  Yeongkwon Ko ,  Donghoon Won

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L23/3142 ,  H01L24/29 ,  H01L2224/94

Abstract: A semiconductor package is provided including a first semiconductor chip stack and a second semiconductor chip stack that are adjacent to each other. The first semiconductor chip stack includes a plurality of first semiconductor chips and a plurality of first adhesive layers. The second semiconductor chip stack includes a plurality of second semiconductor chips and a plurality of second adhesive layers. Each of the first semiconductor chips includes a first cell region and a first scribe lane that surrounds the first cell region. Each of the second semiconductor chips includes a second cell region and a second scribe lane that surrounds the second cell region. An area of the first scribe lane is greater than an area of the second scribe lane. The plurality of first adhesive layers and the plurality of second adhesive layers have the same coefficient of thermal expansion.

公开(公告)号：US10418335B2

公开(公告)日：2019-09-17

申请号：US15850336

申请日：2017-12-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun-Rae Cho ,  Sundae Kim ,  Hyunggil Baek ,  Namgyu Baek ,  Seunghun Shin ,  Donghoon Won

IPC: H01L23/00 ,  H01L21/02 ,  H01L21/78 ,  H01L23/58

Abstract: A method of dividing a substrate includes preparing a substrate including a crystalline semiconductor layer having a scribe lane region and device regions, a dielectric layer on the crystalline semiconductor layer, and a partition structure in physical contact with the dielectric layer and provided on the scribe lane region of the crystalline semiconductor layer, forming an amorphous region in the crystalline semiconductor layer, and performing a grinding process on the crystalline semiconductor layer after the forming of the amorphous region. The amorphous region is formed in the scribe lane region of the crystalline semiconductor layer.