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公开(公告)号:US20230086174A1
公开(公告)日:2023-03-23
申请号:US17852658
申请日:2022-06-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun Mo PARK , Yeon Ho PARK , Eun Sil PARK , Jin Seok LEE , Wang Seop LIM , Kyu Bong CHOI
IPC: H01L27/088 , H01L29/06 , H01L29/08 , H01L29/423 , H01L29/49 , H01L29/786 , H01L29/775 , H01L21/02 , H01L21/28 , H01L21/8234 , H01L29/66
Abstract: A semiconductor device includes first and second sheet patterns spaced apart from each other on a first region of the substrate, a first gate electrode extending between the first and second sheet patterns, third and fourth sheet patterns spaced apart from each other on a second region of the substrate, and a second gate electrode extending between the third and fourth sheet patterns. The first gate electrode includes a first work function controlling film, which is between the first and second sheet patterns, and a first filling conductive film on the first work function controlling film. The second gate electrode includes a second work function controlling film, which is between the third and fourth sheet patterns, and a second filling conductive film on the second work function controlling film. A distance between the third and fourth sheet patterns is greater than a distance between the first and second sheet patterns.
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公开(公告)号:US20230040132A1
公开(公告)日:2023-02-09
申请号:US17741711
申请日:2022-05-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jun Mo PARK , Kyu Bong CHOI , Yeon Ho PARK , Eun Sil PARK , Jin Seok LEE , Wang Seop LIM , Kyung In CHOI
IPC: H01L21/02 , H01L21/8234 , H01L21/768
Abstract: A method of manufacturing a semiconductor device includes: forming first to third preliminary active patterns on a substrate to have different intervals therebetween, forming first and second field insulating layers between the first and second preliminary active patterns and between the second and third preliminary active patterns, respectively, and forming first to third gate electrodes respectively on first to third active patterns formed based on the first to third preliminary active patterns, separated by first and second gate isolation structures.
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公开(公告)号:US20220085016A1
公开(公告)日:2022-03-17
申请号:US17533212
申请日:2021-11-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joong Gun OH , Sung Il PARK , Jae Hyun PARK , Hyung Suk LEE , Eun Sil PARK , Yun Il LEE
IPC: H01L27/092 , H01L29/66 , H01L29/78 , H01L29/06 , H01L29/08 , H01L21/8238 , H01L21/308 , H01L29/423 , H01L21/768
Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.
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公开(公告)号:US20250169173A1
公开(公告)日:2025-05-22
申请号:US19035658
申请日:2025-01-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Joong Gun OH , Sung Il PARK , Jae Hyun PARK , Hyung Suk LEE , Eun Sil PARK , Yun Il LEE
IPC: H10D84/85 , H01L21/308 , H01L21/768 , H10D30/01 , H10D30/62 , H10D62/10 , H10D62/13 , H10D64/01 , H10D64/27 , H10D84/01 , H10D84/03
Abstract: A semiconductor device includes a fin type pattern extending in a first direction on a substrate, a first gate electrode extending in a second direction intersecting the first direction on the fin type pattern, a source/drain region on a side wall of the first gate electrode and in the fin type pattern, a separation structure extending in the first direction on the substrate, the separation structure including a first trench and being spaced apart from the fin type pattern and separating the first gate electrode, an interlayer insulating layer on a side wall of the separation structure and covering the source/drain region, the interlayer insulating layer including a second trench having a lower surface lower than a lower surface of the first trench, and a contact connected to the source/drain region and filling the first trench and the second trench.
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