公开(公告)号：US20130244419A1

公开(公告)日：2013-09-19

申请号：US13875525

申请日：2013-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-Woo SHIN ,  Hyun-Soo CHUNG ,  Eun-Chul AHN ,  Jum-Gon KIM ,  Jin-Ho CHUN

IPC: H01L21/768

CPC classification number: H01L21/76841 ,  H01L23/525 ,  H01L23/53238 ,  H01L24/02 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/04941 ,  H01L2924/12044

Abstract: A semiconductor device including an interconnection structure including a copper pad, a pad barrier layer and a metal redistribution layer, an interconnection structure thereof and methods of fabricating the same are provided. The semiconductor device includes a copper pad disposed on a first layer, a pad barrier layer including titanium disposed on the copper pad, an inorganic insulating layer disposed on the pad barrier layer, a buffer layer disposed on the inorganic insulating layer, wherein the inorganic insulating layer and the buffer layer expose a portion of the pad barrier layer, a seed metal layer disposed on the exposed buffer layer, a metal redistribution layer disposed on the seed metal layer, and a first protective layer disposed on the metal redistribution layer.

Abstract translation: 提供一种包括铜焊盘，焊盘阻挡层和金属再分布层的互连结构的半导体器件，其互连结构及其制造方法。 半导体器件包括设置在第一层上的铜焊盘，包括设置在铜焊盘上的钛的焊盘阻挡层，设置在焊盘阻挡层上的无机绝缘层，设置在无机绝缘层上的缓冲层，其中无机绝缘 所述缓冲层暴露所述焊盘阻挡层的一部分，设置在所述暴露的缓冲层上的种子金属层，设置在所述种子金属层上的金属再分配层以及设置在所述金属再分配层上的第一保护层。

公开(公告)号：US20150325518A1

公开(公告)日：2015-11-12

申请号：US14798474

申请日：2015-07-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Moon-Gi CHO ,  Eun-Chul AHN ,  Sang-Young KIM ,  Joo-Weon SHIN ,  Min-Ho LEE

IPC: H01L23/525 ,  H01L23/532 ,  H01L27/112

CPC classification number: H01L23/5256 ,  G06F12/0246 ,  H01L23/5329 ,  H01L27/11206 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device has improved reliability by preventing a fuse cut through a repair process from being electrically reconnected by electrochemical migration. The semiconductor device includes a substrate, a fuse including a first fuse pattern and a second fuse pattern formed at the same level on the substrate, the first fuse pattern and the second fuse pattern being spaced a first width apart from each other such that a gap in the fuse is disposed at a first location between the first fuse pattern and the second fuse pattern, and a first insulation layer formed on the first fuse pattern and the second fuse pattern, the first insulation layer including an opening above the first location and having a second width smaller than the first width.

Abstract translation: 半导体器件通过防止通过修复过程的熔断体被电化学迁移电连接而提高了可靠性。 半导体器件包括衬底，熔丝，其包括形成在衬底上相同电平处的第一熔丝图案和第二熔丝图案，第一熔丝图案和第二熔丝图案彼此间隔开第一宽度，使得间隙 在所述保险丝设置在所述第一熔丝图案和所述第二熔丝图案之间的第一位置处，以及形成在所述第一熔丝图案和所述第二熔丝图案上的第一绝缘层，所述第一绝缘层包括位于所述第一位置上方的开口，并且具有 第二宽度小于第一宽度。

公开(公告)号：US20150103494A1

公开(公告)日：2015-04-16

申请号：US14513436

申请日：2014-10-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hee-jeong Kim ,  Eun-Chul AHN ,  Yong-Kwan LEE

IPC: H05K1/11 ,  H05K1/18 ,  H05K1/09

CPC classification number: H05K3/24 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/18161 ,  H05K2201/10674 ,  H05K2203/049 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Printed circuit boards are provided. The printed circuit board includes an insulation layer, an interconnection portion and a metal layer. The insulation layer has a flat plate shape and includes a top surface and a bottom surface. The interconnection portion is disposed on at least one of the top and bottom surfaces of the insulation layer. The interconnection portion includes a plurality of interconnection patterns. The metal layer covers the plurality of interconnection patterns of the interconnection portion. Related semiconductor packages are also provided.

Abstract translation: 提供印刷电路板。 印刷电路板包括绝缘层，互连部分和金属层。 绝缘层具有平板形状并且包括顶表面和底表面。 互连部分设置在绝缘层的顶表面和底表面中的至少一个上。 互连部分包括多个互连图案。 金属层覆盖互连部分的多个互连图案。 还提供了相关的半导体封装。