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公开(公告)号:US20220383932A1
公开(公告)日:2022-12-01
申请号:US17819289
申请日:2022-08-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunggeun Do , Youngsik Kim , Gongheum Han , Sangyun Kim , Seunghyun Cho
IPC: G11C11/408 , G11C5/06 , G11C11/406 , G11C11/4074
Abstract: A memory device includes a word line driver circuit, which can advantageously reduce gate stress on a transistor using a lower high voltage that varies with a command, and an operating method of the memory device. The memory device includes a plurality of memory blocks, provides a high voltage or the lower high voltage to a variable high voltage line in response to a block select signal, and changes a level of the lower high voltage to a low voltage level, a medium voltage level, or a high voltage level based on the command. The memory device applies the lower high voltage to gates of P-type metal oxide semiconductor (PMOS) transistors connected to a word line driving signal, which drives word lines of non-selected memory blocks among the plurality of memory blocks.
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公开(公告)号:US11450376B2
公开(公告)日:2022-09-20
申请号:US17038488
申请日:2020-09-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunggeun Do , Youngsik Kim , Gongheum Han , Sangyun Kim , Seunghyun Cho
IPC: G11C11/408 , G11C5/06 , G11C11/406 , G11C11/4074
Abstract: A memory device includes a word line driver circuit, which can advantageously reduce gate stress on a transistor using a lower high voltage that varies with a command, and an operating method of the memory device. The memory device includes a plurality of memory blocks, provides a high voltage or the lower high voltage to a variable high voltage line in response to a block select signal, and changes a level of the lower high voltage to a low voltage level, a medium voltage level, or a high voltage level based on the command. The memory device applies the lower high voltage to gates of P-type metal oxide semiconductor (PMOS) transistors connected to a word line driving signal, which drives word lines of non-selected memory blocks among the plurality of memory blocks.
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公开(公告)号:US12198749B2
公开(公告)日:2025-01-14
申请号:US17819289
申请日:2022-08-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunggeun Do , Youngsik Kim , Gongheum Han , Sangyun Kim , Seunghyun Cho
IPC: G11C11/408 , G11C5/06 , G11C11/406 , G11C11/4074
Abstract: A memory device includes a word line driver circuit, which can advantageously reduce gate stress on a transistor using a lower high voltage that varies with a command, and an operating method of the memory device. The memory device includes a plurality of memory blocks, provides a high voltage or the lower high voltage to a variable high voltage line in response to a block select signal, and changes a level of the lower high voltage to a low voltage level, a medium voltage level, or a high voltage level based on the command. The memory device applies the lower high voltage to gates of P-type metal oxide semiconductor (PMOS) transistors connected to a word line driving signal, which drives word lines of non-selected memory blocks among the plurality of memory blocks.
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公开(公告)号:US20210225425A1
公开(公告)日:2021-07-22
申请号:US17038488
申请日:2020-09-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunggeun Do , Youngsik Kim , Gongheum Han , Sangyun Kim , Seunghyun Cho
IPC: G11C11/408 , G11C11/4074 , G11C11/406 , G11C5/06
Abstract: A memory device includes a word line driver circuit, which can advantageously reduce gate stress on a transistor using a lower high voltage that varies with a command, and an operating method of the memory device. The memory device includes a plurality of memory blocks, provides a high voltage or the lower high voltage to a variable high voltage line in response to a block select signal, and changes a level of the lower high voltage to a low voltage level, a medium voltage level, or a high voltage level based on the command. The memory device applies the lower high voltage to gates of P-type metal oxide semiconductor (PMOS) transistors connected to a word line driving signal, which drives word lines of non-selected memory blocks among the plurality of memory blocks.
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