公开(公告)号：US12113035B2

公开(公告)日：2024-10-08

申请号：US18499527

申请日：2023-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-Su Lee ,  Hong Sik Chae ,  Youn Soo Kim ,  Tae Kyun Kim ,  Youn Joung Cho

IPC: H01L23/64 ,  H10B12/00

CPC classification number: H01L23/642 ,  H10B12/30

Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.

公开(公告)号：US11812601B2

公开(公告)日：2023-11-07

申请号：US17220411

申请日：2021-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Goo Kang ,  Sang Hyuck Ahn ,  Sang Yeol Kang ,  Jin-Su Lee ,  Hyun-Suk Lee ,  Gi Hee Cho ,  Hong Sik Chae

IPC: H10B12/00 ,  H01L49/02

CPC classification number: H10B12/30 ,  H01L28/75

Abstract: A semiconductor device includes a substrate, first and second supporter patterns stacked sequentially on the substrate in a first direction and spaced apart from an upper surface of the substrate, a lower electrode hole that extends through the first and second supporter patterns on the substrate in the first direction, an interface film on side walls and a bottom surface of the lower electrode hole, a lower electrode inside of the lower electrode hole on the interface film, a capacitor dielectric film that is in physical contact with side walls of the interface film, an uppermost surface of the interface film, and an uppermost surface of the lower electrode, the uppermost surface of the interface film is formed on a same plane as an upper surface of the second supporter pattern.

公开(公告)号：US11848287B2

公开(公告)日：2023-12-19

申请号：US17470370

申请日：2021-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-su Lee ,  Hong Sik Chae ,  Youn Soo Kim ,  Tae Kyun Kim ,  Youn Joung Cho

IPC: H01L23/64 ,  H01L27/108 ,  H10B12/00

CPC classification number: H01L23/642 ,  H10B12/30

Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.

公开(公告)号：US20220037325A1

公开(公告)日：2022-02-03

申请号：US17220411

申请日：2021-04-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jun Goo Kang ,  Sang Hyuck Ahn ,  Sang Yeol Kang ,  Jin-Su Lee ,  Hyun-Suk Lee ,  Gi Hee Cho ,  Hong Sik Chae

IPC: H01L27/108 ,  H01L49/02

Abstract: A semiconductor device includes a substrate, first and second supporter patterns stacked sequentially on the substrate in a first direction and spaced apart from an upper surface of the substrate, a lower electrode hole that extends through the first and second supporter patterns on the substrate in the first direction, an interface film on side walls and a bottom surface of the lower electrode hole, a lower electrode inside of the lower electrode hole on the interface film, a capacitor dielectric film that is in physical contact with side walls of the interface film, an uppermost surface of the interface film, and an uppermost surface of the lower electrode, the uppermost surface of the interface film is formed on a same plane as an upper surface of the second supporter pattern.