公开(公告)号：US20240055428A1

公开(公告)日：2024-02-15

申请号：US18182563

申请日：2023-03-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Kwan YU ,  Sunyoung LEE ,  Hayoung JEON ,  Hwiseok JUN ,  Ji Hoon CHA

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/775 ,  H01L21/8238 ,  H01L29/66

CPC classification number: H01L27/092 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/42392 ,  H01L29/775 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/66439

Abstract: A semiconductor device comprises a substrate including NMOSFET and PMOSFET regions, first and second channel patterns on the NMOSFET and PMOSFET regions, respectively, and each including respective semiconductor patterns spaced apart from and vertically stacked on each other, first and second source/drain patterns on the NMOSFET and NMOSFET regions and connected to the first and second channel patterns, respectively, and a gate electrode on the first and second channel patterns. The gate electrode includes a first inner electrode between neighboring semiconductor patterns of the first channel pattern, and a second inner electrode between neighboring semiconductor patterns of the second channel pattern. A top surface of the first inner electrode is more convex than a top surface of the second inner electrode.