公开(公告)号：US09443734B2

公开(公告)日：2016-09-13

申请号：US14574907

申请日：2014-12-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Seok Lee ,  Jung-Hwan Park ,  Hyo-Jin Park ,  Kyu-Hyun Lee

IPC: H01L21/28 ,  H01L29/423 ,  H01L27/108

CPC classification number: H01L21/28008 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/10894 ,  H01L29/4236

Abstract: A semiconductor memory device and a manufacturing method of the semiconductor memory device are provided. The semiconductor memory device can include a substrate in which a cell area and a peripheral area are defined, a first gate insulating layer on the peripheral area, and a poly gate layer on the first gate insulating layer to form a combined stack, wherein the combined stack of the first gate insulating layer and the first poly gate layer is absent from the cell area.

Abstract translation: 提供半导体存储器件和半导体存储器件的制造方法。 半导体存储器件可以包括其中限定了单元区域和外围区域的基板，外围区域上的第一栅极绝缘层，以及在第一栅极绝缘层上形成组合堆叠的多晶硅栅极层，其中组合 第一栅极绝缘层和第一多晶硅层的堆叠不存在于电池区域中。

公开(公告)号：US20150179658A1

公开(公告)日：2015-06-25

申请号：US14574907

申请日：2014-12-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki-Seok Lee ,  Jung-Hwan Park ,  Hyo-Jin Park ,  Kyu-Hyun Lee

IPC: H01L27/115 ,  H01L21/28

CPC classification number: H01L21/28008 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/10894 ,  H01L29/4236

Abstract: A semiconductor memory device and a manufacturing method of the semiconductor memory device are provided. The semiconductor memory device can include a substrate in which a cell area and a peripheral area are defined, a first gate insulating layer on the peripheral area, and a poly gate layer on the first gate insulating layer to form a combined stack, wherein the combined stack of the first gate insulating layer and the first poly gate layer is absent from the cell area.

Abstract translation: 提供半导体存储器件和半导体存储器件的制造方法。 半导体存储器件可以包括其中限定了单元区域和外围区域的基板，外围区域上的第一栅极绝缘层，以及在第一栅极绝缘层上形成组合堆叠的多晶硅栅极层，其中组合 第一栅极绝缘层和第一多晶硅层的堆叠不存在于电池区域中。