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    IMAGE SENSOR TEST SYSTEM
    1.
    发明公开
    IMAGE SENSOR TEST SYSTEM 审中-公开

    公开(公告)号：US20230362350A1

    公开(公告)日：2023-11-09

    申请号：US18071021

    申请日：2022-11-29

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seongkwan Lee ,  Minho Kang ,  Cheolmin Park ,  Hyungsun Ryu ,  Jaemoo Choi

    IPC: H04N17/00 ,  H04N25/76

    CPC classification number: H04N17/002 ,  H04N25/76

    Abstract: An image sensor test system includes a test device configured to transmit an input signal and a control signal to at least one image sensor through a probe card, and an interface board configured to map the probe card and the test device to each other. The interface board includes a signal receiver configured to receive an image signal from the at least one image sensor, amplify the image signal, and output the image signal to the test device, and the signal receiver includes an operational amplifier configured to amplify the image signal, and a low-frequency attenuator connected to an output terminal of the operational amplifier.

    WAFER-LEVEL MULTI-DEVICE TESTER AND SYSTEM INCLUDING THE SAME
    3.
    发明公开
    WAFER-LEVEL MULTI-DEVICE TESTER AND SYSTEM INCLUDING THE SAME 审中-公开

    公开(公告)号：US20240085478A1

    公开(公告)日：2024-03-14

    申请号：US18299265

    申请日：2023-04-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seongkwan Lee ,  Hyungsun Ryu ,  Kangmin Lee ,  Jaemoo Choi

    IPC: G01R31/319 ,  G01R31/28

    CPC classification number: G01R31/31926 ,  G01R31/2844

    Abstract: A tester, which is adapted to test a device under test (DUT), includes a first plurality of signal analysis circuits configured to analyze signals generated by a plurality of DUTs, and a second plurality of signal processing units configured to process the signals analyzed by the first plurality of signal analysis circuits. A switch array is provided, which is electrically coupled between the first plurality of signal analysis circuits and the second plurality of signal processing units. The switch array is configured to electrically connect selected ones of the first plurality of signal analysis circuits with corresponding ones of the second plurality of signal processing units. The number of signal processing units within the second plurality may be less than a maximum number of DUTs that can be connected to the first plurality of signal analysis circuits when the tester is testing a plurality of the DUTs.

    APPARATUS FOR TESTING IMAGE SENSOR AND OPERATING METHOD THEREOF
    4.
    发明公开
    APPARATUS FOR TESTING IMAGE SENSOR AND OPERATING METHOD THEREOF 审中-公开

    公开(公告)号：US20240053391A1

    公开(公告)日：2024-02-15

    申请号：US18183446

    申请日：2023-03-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seongkwan Lee ,  Minho Kang ,  Hyungsun Ryu ,  Cheolmin Park ,  Jaemoo Choi

    IPC: G01R27/08 ,  G01R35/00 ,  G01R31/28

    CPC classification number: G01R27/08 ,  G01R35/005 ,  G01R31/2851

    Abstract: An apparatus for testing an image sensor includes a load resistor, a first switch configured to be electrically connected to a first signal line of a device under test and a first end of the load resistor, a second switch configured to be electrically connected to a second signal line of the device under test and a second end of the load resistor, a first parametric measuring unit electrically connected to the first switch, and a second parametric measuring unit electrically connected to the second switch. At least one of the first parametric measuring unit and the second parametric unit is configured to correct an error of the load resistor during a testing operation of an output voltage of the device under test.

    Wafer-level multi-device tester and system including the same preliminary class
    6.
    发明授权
    Wafer-level multi-device tester and system including the same preliminary class 有权

    公开(公告)号：US12105146B2

    公开(公告)日：2024-10-01

    申请号：US18299265

    申请日：2023-04-12

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seongkwan Lee ,  Hyungsun Ryu ,  Kangmin Lee ,  Jaemoo Choi

    IPC: G01R31/319 ,  G01R31/28

    CPC classification number: G01R31/31926 ,  G01R31/2844

    Abstract: A tester, which is adapted to test a device under test (DUT), includes a first plurality of signal analysis circuits configured to analyze signals generated by a plurality of DUTs, and a second plurality of signal processing units configured to process the signals analyzed by the first plurality of signal analysis circuits. A switch array is provided, which is electrically coupled between the first plurality of signal analysis circuits and the second plurality of signal processing units. The switch array is configured to electrically connect selected ones of the first plurality of signal analysis circuits with corresponding ones of the second plurality of signal processing units. The number of signal processing units within the second plurality may be less than a maximum number of DUTs that can be connected to the first plurality of signal analysis circuits when the tester is testing a plurality of the DUTs.

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