APPARATUS FOR TESTING IMAGE SENSOR AND OPERATING METHOD THEREOF

    公开(公告)号:US20240053391A1

    公开(公告)日:2024-02-15

    申请号:US18183446

    申请日:2023-03-14

    CPC classification number: G01R27/08 G01R35/005 G01R31/2851

    Abstract: An apparatus for testing an image sensor includes a load resistor, a first switch configured to be electrically connected to a first signal line of a device under test and a first end of the load resistor, a second switch configured to be electrically connected to a second signal line of the device under test and a second end of the load resistor, a first parametric measuring unit electrically connected to the first switch, and a second parametric measuring unit electrically connected to the second switch. At least one of the first parametric measuring unit and the second parametric unit is configured to correct an error of the load resistor during a testing operation of an output voltage of the device under test.

    HIGH BANDWIDTH MEMORY SYSTEM USING MULTILEVEL SIGNALING

    公开(公告)号:US20220238146A1

    公开(公告)日:2022-07-28

    申请号:US17483010

    申请日:2021-09-23

    Abstract: A high bandwidth memory system includes a motherboard; and a semiconductor package coupled to the motherboard. The semiconductor package includes a package substrate mounted on the motherboard and including signal lines providing a plurality of channels; a first semiconductor device mounted on the package substrate and including a first physical layer (PHY) circuit; and a second semiconductor device mounted on the package substrate and including a second PHY circuit. The first semiconductor device and the second semiconductor device exchange a data signal with each other through the plurality of channels, the data signal is a multilevel signal having M levels, where M is a natural number greater than 2, and the first PHY circuit compensates for distortion of the channels and performs digital signal processing to compensate for a mismatch between the channels.

    HIGH PERFORMANCE RECEIVERS FOR MOBILE INDUSTRY PROCESSOR INTERFACES (MIPI) AND METHODS OF OPERATING SAME

    公开(公告)号:US20220060358A1

    公开(公告)日:2022-02-24

    申请号:US17368459

    申请日:2021-07-06

    Abstract: A receiver, which is compatible with a mobile industry processor interface (MIPI) C-PHY physical layer, includes a plurality of variable-gain amplifiers responsive to respective multi-level signals (e.g., 3-level signals), and a plurality of filters having variable cutoff frequencies. The plurality of filters are responsive to respective signals generated by the plurality of amplifiers. An array of comparators is provided, which is responsive to signals generated by the plurality of filters. A jitter detection circuit is provided, which is configured to set respective gains of the plurality of variable-gain amplifiers and respective cutoff frequencies of the plurality of filters (e.g., high-pass filters), in response to signals generated by the array of comparators.

    High bandwidth memory system using multilevel signaling

    公开(公告)号:US11631444B2

    公开(公告)日:2023-04-18

    申请号:US17483010

    申请日:2021-09-23

    Abstract: A high bandwidth memory system includes a motherboard; and a semiconductor package coupled to the motherboard. The semiconductor package includes a package substrate mounted on the motherboard and including signal lines providing a plurality of channels; a first semiconductor device mounted on the package substrate and including a first physical layer (PHY) circuit; and a second semiconductor device mounted on the package substrate and including a second PHY circuit. The first semiconductor device and the second semiconductor device exchange a data signal with each other through the plurality of channels, the data signal is a multilevel signal having M levels, where M is a natural number greater than 2, and the first PHY circuit compensates for distortion of the channels and performs digital signal processing to compensate for a mismatch between the channels.

    High performance receivers for mobile industry processor interfaces (MIPI) and methods of operating same

    公开(公告)号:US11843487B2

    公开(公告)日:2023-12-12

    申请号:US17368459

    申请日:2021-07-06

    CPC classification number: H04L25/4917 G09G3/2096 H04N5/06

    Abstract: A receiver, which is compatible with a mobile industry processor interface (MIPI) C-PHY physical layer, includes a plurality of variable-gain amplifiers responsive to respective multi-level signals (e.g., 3-level signals), and a plurality of filters having variable cutoff frequencies. The plurality of filters are responsive to respective signals generated by the plurality of amplifiers. An array of comparators is provided, which is responsive to signals generated by the plurality of filters. A jitter detection circuit is provided, which is configured to set respective gains of the plurality of variable-gain amplifiers and respective cutoff frequencies of the plurality of filters (e.g., high-pass filters), in response to signals generated by the array of comparators.

    IMAGE SENSOR TEST SYSTEM
    7.
    发明公开

    公开(公告)号:US20230362350A1

    公开(公告)日:2023-11-09

    申请号:US18071021

    申请日:2022-11-29

    CPC classification number: H04N17/002 H04N25/76

    Abstract: An image sensor test system includes a test device configured to transmit an input signal and a control signal to at least one image sensor through a probe card, and an interface board configured to map the probe card and the test device to each other. The interface board includes a signal receiver configured to receive an image signal from the at least one image sensor, amplify the image signal, and output the image signal to the test device, and the signal receiver includes an operational amplifier configured to amplify the image signal, and a low-frequency attenuator connected to an output terminal of the operational amplifier.

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