公开(公告)号：US20230267190A1

公开(公告)日：2023-08-24

申请号：US18083881

申请日：2022-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heangsu KIM ,  Yeongseon KIM ,  Ilwoo KIM ,  Sungmin AHN

IPC: G06F21/34 ,  G06F21/60

CPC classification number: G06F21/34 ,  G06F21/602

Abstract: A method for operating an electronic device including at least one communication circuit and a display include receiving, via a connection from another electronic device, data that is encrypted based on scan of the barcode through a camera of the other electronic device. The method include executing the initial setup based on at least one signal received from the other electronic device after authenticating the other electronic device by using the data.

公开(公告)号：US20220344367A1

公开(公告)日：2022-10-27

申请号：US17505842

申请日：2021-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwanyeol PARK ,  Sejin KYUNG ,  Ilwoo KIM ,  Minwoo LEE ,  Youngho JEUNG

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157

Abstract: In a method of manufacturing a semiconductor device, a first insulation layer and a first sacrificial layer are alternately and repeatedly formed on a substrate to form a mold layer. A sacrificial layer structure is formed on the mold layer to include an etch stop layer and a second sacrificial layer sequentially stacked. After forming a hard mask on the sacrificial layer structure, the sacrificial layer structure and the mold layer are etched by a dry etching process using the hard mask as an etching mask to form a channel hole exposing an upper surface of the substrate and form a recess on a sidewall of the second sacrificial layer adjacent to the channel hole. A memory channel structure is formed in the channel hole. The first sacrificial layer is replaced with a gate electrode.

公开(公告)号：US20240047247A1

公开(公告)日：2024-02-08

申请号：US18184418

申请日：2023-03-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chansoo KANG ,  Daewon KANG ,  Sangki NAM ,  Jungmo YANG ,  Changsoon LIM ,  Sungho JANG ,  Jonghun PI ,  Youngil KANG ,  Yoonjae KIM ,  Ilwoo KIM ,  Jongmu KIM ,  Yongbeom PARK

IPC: H01L21/67 ,  H01J37/32

CPC classification number: H01L21/67253 ,  H01J37/32944 ,  H01J2237/221

Abstract: A semiconductor process device includes a chamber housing defining an internal region and a plurality of electrostatic chucks within the internal region. The chamber housing includes a window, and a light collection unit including a first optical system and a second optical system located at different positions on the window. A plurality of first optical pickup units are connected to the first optical system, and a plurality of second optical pickup units are connected to the second optical system. A sensor includes a plurality of photodetectors that are configured to convert a first optical signal transmitted by the plurality of first optical pickup units and a second optical signal transmitted by the plurality of second optical pickup units into electrical signals. A processor is configured to generate a spatial image of the internal region of the chamber housing using the electrical signals output by the plurality of photodetectors, and determine a location at which an arc occurs in the internal region of the chamber housing based on the spatial image.

公开(公告)号：US20220344166A1

公开(公告)日：2022-10-27

申请号：US17522193

申请日：2021-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwanyeol PARK ,  Jongyoung PARK ,  Yongdeok LEE ,  Sejin KYUNG ,  Daewee KONG ,  Ilwoo KIM ,  Songyi BAEK ,  Philippe COCHE

IPC: H01L21/308 ,  H01L21/02 ,  H01L49/02 ,  H01L21/768

Abstract: Provided is a semiconductor device. The semiconductor device includes a wafer; an etch stop layer on the wafer; a lower mold layer on the etch stop layer; an intermediate supporter layer on the lower mold layer; an upper mold layer on the intermediate supporter layer; an upper supporter layer on the upper mold layer; and a hard mask structure on the upper supporter layer, wherein the hard mask structure includes a first hard mask layer on the upper supporter layer and a second hard mask layer on the first hard mask layer, one of the first hard mask layer and the second hard mask layer includes a first organic layer including a SOH containing C, H, O, and N, and the other one of the first hard mask layer and the second hard mask layer includes a second organic layer including an SOH containing C, H, and O.