公开(公告)号：US20220344166A1

公开(公告)日：2022-10-27

申请号：US17522193

申请日：2021-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwanyeol PARK ,  Jongyoung PARK ,  Yongdeok LEE ,  Sejin KYUNG ,  Daewee KONG ,  Ilwoo KIM ,  Songyi BAEK ,  Philippe COCHE

IPC: H01L21/308 ,  H01L21/02 ,  H01L49/02 ,  H01L21/768

Abstract: Provided is a semiconductor device. The semiconductor device includes a wafer; an etch stop layer on the wafer; a lower mold layer on the etch stop layer; an intermediate supporter layer on the lower mold layer; an upper mold layer on the intermediate supporter layer; an upper supporter layer on the upper mold layer; and a hard mask structure on the upper supporter layer, wherein the hard mask structure includes a first hard mask layer on the upper supporter layer and a second hard mask layer on the first hard mask layer, one of the first hard mask layer and the second hard mask layer includes a first organic layer including a SOH containing C, H, O, and N, and the other one of the first hard mask layer and the second hard mask layer includes a second organic layer including an SOH containing C, H, and O.

公开(公告)号：US20230245887A1

公开(公告)日：2023-08-03

申请号：US18093653

申请日：2023-01-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yong PARK ,  Jin-Hyuk KIM ,  Jin-Hong PARK ,  Sejin KYUNG

IPC: H01L21/02 ,  H01L27/146 ,  H01L29/24 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L21/02614 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02568 ,  H01L27/14616 ,  H01L27/1461 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/775 ,  H01L29/0673

Abstract: Disclosed are methods of forming PN junction structures, methods of fabricating semiconductor devices using the same, and semiconductor devices fabricated by the same. The method of forming a PN junction structure includes: forming on a substrate a first material layer that includes first transition metal atoms and first chalcogen atoms, loading the first material layer into a process chamber and supplying a gas of second chalcogen atoms, and forming a second material layer by substituting the second chalcogen atoms for the first chalcogen atoms on a selected portion of the first material layer. The first material layer has one of n-type conductivity and p-type conductivity. The second material layer has the other of the n-type conductivity and the p-type conductivity.

公开(公告)号：US20230074307A1

公开(公告)日：2023-03-09

申请号：US17852628

申请日：2022-06-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwanyeol PARK ,  Kyungnam KANG ,  Jeonghoon NAM ,  Sejin KYUNG ,  Daewee KONG ,  Taemin KIM

IPC: C23C16/458 ,  H01L21/687 ,  H01J37/32 ,  C23C16/50 ,  C23C16/455 ,  C23C16/46 ,  H05B3/12 ,  H05B3/28

Abstract: A substrate support unit includes: a ceramic body having a surface for supporting a substrate, the ceramic body including aluminum nitride (AlN), a heat generating resistor disposed in the ceramic body, and including molybdenum (Mo), and a coating layer surrounding the heat generating resistor, and including molybdenum aluminum nitride (MoAlN).

公开(公告)号：US20230175124A1

公开(公告)日：2023-06-08

申请号：US17878622

申请日：2022-08-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Songyi BAEK ,  Youngtack SIM ,  Jiwon KWAK ,  Sejin KYUNG ,  Daewee KONG ,  Taemin KIM

IPC: C23C16/44 ,  C23C16/455 ,  H01L21/02

CPC classification number: C23C16/4405 ,  C23C16/45546 ,  H01L21/0217

Abstract: A substrate processing system includes: a process chamber that performs a semiconductor process on a substrate; a first oxygen supply unit; a first chamber that receives a gas containing oxygen (O2) from the first oxygen supply unit, receives exhaust gases discharged from the process chamber, and oxidizes the exhaust gas using the oxygen supplied from the first oxygen supply unit; a second chamber connected to the first chamber, and that receives a first treatment gas from the first chamber and bums the first treatment gas; a third chamber connected to the second chamber, and that receives a second treatment gas from the second chamber and performs a wetting treatment of the second treatment gas; and a tank disposed below the first to third chambers and connected to each of the first to third chambers.

公开(公告)号：US20230081402A1

公开(公告)日：2023-03-16

申请号：US17899832

申请日：2022-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwanyeol PARK ,  Sejun PARK ,  Junhyoung CHO ,  Sejin KYUNG ,  Daewee KONG ,  Taemin KIM

IPC: H01L21/30

Abstract: A method of manufacturing a semiconductor device includes preparing a substrate including cell regions and a scribe lane region, forming circuit blocks in the cell regions of the substrate, the substrate including a first surface and a second surface, forming a bias pad on the first surface of the substrate, such that the bias pad is in the scribe lane region of the substrate, bonding a deuterium exchange structure to the second surface of the substrate, implanting deuterium into the deuterium exchange structure using plasma processing, and applying a first voltage to the bias pad, such that the deuterium is diffused from the deuterium exchange structure into the substrate through the second surface of the substrate.

公开(公告)号：US20220344367A1

公开(公告)日：2022-10-27

申请号：US17505842

申请日：2021-10-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hwanyeol PARK ,  Sejin KYUNG ,  Ilwoo KIM ,  Minwoo LEE ,  Youngho JEUNG

IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157

Abstract: In a method of manufacturing a semiconductor device, a first insulation layer and a first sacrificial layer are alternately and repeatedly formed on a substrate to form a mold layer. A sacrificial layer structure is formed on the mold layer to include an etch stop layer and a second sacrificial layer sequentially stacked. After forming a hard mask on the sacrificial layer structure, the sacrificial layer structure and the mold layer are etched by a dry etching process using the hard mask as an etching mask to form a channel hole exposing an upper surface of the substrate and form a recess on a sidewall of the second sacrificial layer adjacent to the channel hole. A memory channel structure is formed in the channel hole. The first sacrificial layer is replaced with a gate electrode.