公开(公告)号：US20140120685A1

公开(公告)日：2014-05-01

申请号：US13791870

申请日：2013-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong Hoon JEONG ,  Yoongoo KANG ,  Ho-Kyun AN ,  KONGSOO LEE ,  JAEJONG HAN

IPC: H01L45/00

CPC classification number: H01L27/2409 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144

Abstract: A semiconductor device and method of forming a semiconductor device is disclosed. The method includes forming a first ion-implanted layer having an amorphous state in a substrate; forming an impurity region of a first conductive type in the substrate; forming a semiconductor pattern on the substrate; forming a first doped region of the first conductive type in the semiconductor pattern; and forming a second doped region of a second conductive type contrary to the first conductive type in the semiconductor pattern. The first ion-implanted layer is formed by implanting carbons ions or germanium ions in the substrate.

Abstract translation: 公开了一种形成半导体器件的半导体器件和方法。 该方法包括在基板中形成具有非晶状态的第一离子注入层; 在衬底中形成第一导电类型的杂质区; 在所述基板上形成半导体图案; 在半导体图案中形成第一导电类型的第一掺杂区域; 以及形成与所述半导体图案中的所述第一导电类型相反的第二导电类型的第二掺杂区域。 第一离子注入层通过在基底中注入碳离子或锗离子而形成。

公开(公告)号：US20170148901A1

公开(公告)日：2017-05-25

申请号：US15422907

申请日：2017-02-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： KYUNGIN CHOI ,  Sunghyun CHOI ,  Yong-Suk TAK ,  BONYOUNG KOO ,  JAEJONG HAN

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/223

CPC classification number: H01L29/66803 ,  H01L21/2236 ,  H01L21/762 ,  H01L21/823431 ,  H01L21/845 ,  H01L29/0649 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/7851

Abstract: A method of manufacturing a semiconductor device includes forming a preliminary fin-type active pattern extending in a first direction, forming a device isolation pattern covering a lower portion of the preliminary fin-type active pattern, forming a gate structure extending in a second direction and crossing over the preliminary fin-type active pattern, forming a fin-type active pattern having a first region and a second region, forming a preliminary impurity-doped pattern on the second region by using a selective epitaxial-growth process, and forming an impurity-doped pattern by injecting impurities using a plasma doping process, wherein the upper surface of the first region is at a first level and the upper surface of the second region is at a second level lower than the first level.