公开(公告)号：US20250096181A1

公开(公告)日：2025-03-20

申请号：US18969410

申请日：2024-12-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changbo LEE ,  KWANHOO SON ,  JOON SEOK OH

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/683 ,  H01L21/768 ,  H01L23/31 ,  H01L23/522 ,  H01L23/528

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The method comprises providing a carrier substrate that includes a conductive layer, placing a semiconductor die on the carrier substrate, forming an insulating layer to cover the semiconductor die on the carrier substrate, forming a via hole to penetrate the insulating layer at a side of the semiconductor die and to expose the conductive layer of the carrier substrate, performing a plating process in which the conductive layer of the carrier substrate is used as a seed to form a via filling the via hole, forming a first redistribution layer on a first surface of the semiconductor die and the insulating layer, removing the carrier substrate, and forming a second redistribution layer on a second surface of the semiconductor die and the insulating layer, the first surface and the second surface being located opposite each other.

公开(公告)号：US20230387059A1

公开(公告)日：2023-11-30

申请号：US18143983

申请日：2023-05-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changbo LEE ,  KWANHOO SON ,  JOON SEOK OH

IPC: H01L23/00 ,  H01L23/522 ,  H01L21/768 ,  H01L23/31 ,  H01L21/56 ,  H01L21/683 ,  H01L23/528

CPC classification number: H01L24/20 ,  H01L24/13 ,  H01L24/19 ,  H01L24/11 ,  H01L23/5226 ,  H01L21/76871 ,  H01L23/315 ,  H01L21/566 ,  H01L21/6835 ,  H01L23/5283 ,  H01L2224/214 ,  H01L2221/68359

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The method comprises providing a carrier substrate that includes a conductive layer, placing a semiconductor die on the carrier substrate, forming an insulating layer to cover the semiconductor die on the carrier substrate, forming a via hole to penetrate the insulating layer at a side of the semiconductor die and to expose the conductive layer of the carrier substrate, performing a plating process in which the conductive layer of the carrier substrate is used as a seed to form a via filling the via hole, forming a first redistribution layer on a first surface of the semiconductor die and the insulating layer, removing the carrier substrate, and forming a second redistribution layer on a second surface of the semiconductor die and the insulating layer, the first surface and the second surface being located opposite each other.

公开(公告)号：US20240321722A1

公开(公告)日：2024-09-26

申请号：US18481872

申请日：2023-10-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOONYOUNG JEON ,  YOUNGMIN KIM ,  JOON SEOK OH ,  CHANGBO LEE

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49894 ,  H01L21/4857 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16227

Abstract: A semiconductor package includes a semiconductor chip, and a redistribution structure connected to the semiconductor chip. The redistribution structure may include an under bump pattern, a first redistribution layer disposed on the under bump pattern and including a first redistribution pad, a partition disposed inside the first redistribution pad and including a material that is different from that of the first redistribution pad, a contact via disposed on the first redistribution pad and the partition, and a second redistribution layer including a second redistribution pad disposed on the contact via.

公开(公告)号：US20210242158A1

公开(公告)日：2021-08-05

申请号：US17070540

申请日：2020-10-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changbo LEE ,  KWANHOO SON ,  JOON SEOK OH

IPC: H01L23/00 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768 ,  H01L23/31 ,  H01L21/56 ,  H01L21/683

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The method comprises providing a carrier substrate that includes a conductive layer, placing a semiconductor die on the carrier substrate, forming an insulating layer to cover the semiconductor die on the carrier substrate, forming a via hole to penetrate the insulating layer at a side of the semiconductor die and to expose the conductive layer of the carrier substrate, performing a plating process in which the conductive layer of the carrier substrate is used as a seed to form a via filling the via hole, forming a first redistribution layer on a first surface of the semiconductor die and the insulating layer, removing the carrier substrate, and forming a second redistribution layer on a second surface of the semiconductor die and the insulating layer, the first surface and the second surface being located opposite each other.