Abstract:
Example embodiments relate to methods of doping a 2-dimensional semiconductor. The method includes forming a semiconductor layer on a substrate, implanting ions into the semiconductor layer, forming a doped layer formed of a 2-dimensional semiconductor layer or an organic semiconductor layer on the semiconductor layer, and doping the doped layer by diffusing the ions of the semiconductor layer into the doped layer through annealing the substrate.
Abstract:
Provided are graphene transistors having a tunable barrier. The graphene transistor includes a semiconductor substrate, an insulating thin film disposed on the semiconductor substrate, a graphene layer on the insulating thin film, a first electrode connected to an end of the graphene layer, a second electrode that is separate from an other end of the graphene layer and contacts the semiconductor substrate, a gate insulating layer covering the graphene layer, and a gate electrode on the gate insulating layer, wherein an energy barrier is formed between the semiconductor substrate and the graphene layer.