公开(公告)号：US20190287792A1

公开(公告)日：2019-09-19

申请号：US16165567

申请日：2018-10-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin PARK ,  Sang Ki NAM ,  Kyu-hee HAN ,  Jin-ok KIM ,  Jin-hong PARK ,  Gwang-we YOO

IPC: H01L21/027 ,  G03F7/11 ,  G03F7/16 ,  G03F7/20 ,  G03F7/38 ,  G03F7/32

Abstract: A method of manufacturing an integrated circuit (IC) device includes exposing a partial region of a photoresist film formed on a main surface of a substrate to generate acid, and diffusing the acid in the partial region of the photoresist film. Diffusing the acid may include applying an electric field, in a direction perpendicular to a direction in which the main surface of the substrate extends, to the photoresist film using an electrode facing the substrate through an electric-field transmission layer filling between the photoresist film and the electrode. The electric-field transmission layer may include an ion-containing layer or a conductive polymer layer.

公开(公告)号：US20170068157A1

公开(公告)日：2017-03-09

申请号：US15183846

申请日：2016-06-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang-min PARK ,  Jin-hong PARK ,  Myung-soo HWANG

IPC: G03F1/64 ,  G03F1/24

CPC classification number: G03F1/64 ,  G03F1/24

Abstract: A pellicle for a reflective mask including a pellicle body, a light shielding pattern, a grating pattern, and a pellicle frame. The pellicle body includes a central region and a peripheral region, wherein the peripheral region surrounds the central region. The light shielding pattern is formed on the peripheral region of the pellicle body; the grating pattern is formed on the light shielding pattern, and the pellicle frame is located under the peripheral region of the pellicle body, and the pellicle frame is configured to support the pellicle body.

Abstract translation: 一种防护薄膜组件，包括防护薄膜组件，遮光图案，光栅图案和防护薄膜框架。 防护薄膜组件包括中心区域和周边区域，其中周边区域围绕中心区域。 遮光图案形成在防护薄膜组件本体的周边区域上; 光栅图案形成在遮光图案上，防护薄膜组件框架位于防护薄膜组件本体的周边区域的下方，防护薄膜组件框架被构造成支撑防护薄膜组件体。

公开(公告)号：US20150214482A1

公开(公告)日：2015-07-30

申请号：US14340108

申请日：2014-07-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-hong PARK ,  Hyung-youl PARK ,  Jae-woo SHIM ,  Jae-ho LEE

IPC: H01L51/00 ,  H01L51/10 ,  H01L51/05

CPC classification number: H01L51/002 ,  H01L21/225 ,  H01L21/2253 ,  H01L21/76251 ,  H01L29/1606 ,  H01L29/24 ,  H01L51/0558

Abstract: Example embodiments relate to methods of doping a 2-dimensional semiconductor. The method includes forming a semiconductor layer on a substrate, implanting ions into the semiconductor layer, forming a doped layer formed of a 2-dimensional semiconductor layer or an organic semiconductor layer on the semiconductor layer, and doping the doped layer by diffusing the ions of the semiconductor layer into the doped layer through annealing the substrate.

Abstract translation: 示例实施例涉及掺杂二维半导体的方法。 该方法包括在衬底上形成半导体层，将离子注入到半导体层中，在半导体层上形成由二维半导体层或有机半导体层形成的掺杂层，并通过扩散掺杂层 半导体层通过退火衬底进入掺杂层。

公开(公告)号：US20150214304A1

公开(公告)日：2015-07-30

申请号：US14328339

申请日：2014-07-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin-hong PARK ,  Jae-woo SHIM ,  Hyung-youl PARK ,  Jae-ho LEE

IPC: H01L29/16 ,  H01L29/78

CPC classification number: H01L29/1606 ,  H01L29/78

Abstract: Provided are graphene transistors having a tunable barrier. The graphene transistor includes a semiconductor substrate, an insulating thin film disposed on the semiconductor substrate, a graphene layer on the insulating thin film, a first electrode connected to an end of the graphene layer, a second electrode that is separate from an other end of the graphene layer and contacts the semiconductor substrate, a gate insulating layer covering the graphene layer, and a gate electrode on the gate insulating layer, wherein an energy barrier is formed between the semiconductor substrate and the graphene layer.

Abstract translation: 提供了具有可调屏障的石墨烯晶体管。 所述石墨烯晶体管包括半导体衬底，设置在所述半导体衬底上的绝缘薄膜，所述绝缘薄膜上的石墨烯层，连接到所述石墨烯层的端部的第一电极，与所述石墨烯层的另一端分离的第二电极， 所述石墨烯层与所述半导体衬底接触，覆盖所述石墨烯层的栅极绝缘层和所述栅极绝缘层上的栅电极，其中在所述半导体衬底和所述石墨烯层之间形成能量势垒。