SYSTEM-ON-CHIP AND ADDRESS TRANSLATION METHOD THEREOF
    1.
    发明申请
    SYSTEM-ON-CHIP AND ADDRESS TRANSLATION METHOD THEREOF 有权
    系统片上和地址翻译方法

    公开(公告)号:US20150082000A1

    公开(公告)日:2015-03-19

    申请号:US14462774

    申请日:2014-08-19

    Abstract: A memory management unit comprises an address translation unit that receives a memory access request as a virtual address and translates the virtual address to a physical address. A translation lookaside buffer stores page descriptors of a plurality of physical addresses, the address translation unit determining whether a page descriptor of a received virtual address is present in the translation lookaside buffer. A prefetch buffer stores page descriptors of the plurality of physical addresses. The address translation unit, in the event the page descriptor of the received virtual address is not present in the translation lookaside buffer, further determines whether the page descriptor of the received virtual address is present in the prefetch buffer; updates the translation lookaside buffer with the page descriptor in response to the determination; and performs a translation of the virtual address to a physical address using the page descriptor.

    Abstract translation: 存储器管理单元包括地址转换单元,其接收作为虚拟地址的存储器访问请求并将虚拟地址转换为物理地址。 翻译后备缓冲器存储多个物理地址的页面描述符,地址转换单元确定所接收的虚拟地址的页面描述符是否存在于翻译后备缓冲器中。 预取缓冲器存储多个物理地址的页面描述符。 地址转换单元,在接收到的虚拟地址的页面描述符不存在于翻译后备缓冲器中的情况下,进一步确定接收的虚拟地址的页面描述符是否存在于预取缓冲器中; 响应于确定,用页面描述符更新翻译后备缓冲器; 并使用页面描述符执行虚拟地址到物理地址的转换。

Patent Agency Ranking