Abstract:
A memory management unit comprises an address translation unit that receives a memory access request as a virtual address and translates the virtual address to a physical address. A translation lookaside buffer stores page descriptors of a plurality of physical addresses, the address translation unit determining whether a page descriptor of a received virtual address is present in the translation lookaside buffer. A prefetch buffer stores page descriptors of the plurality of physical addresses. The address translation unit, in the event the page descriptor of the received virtual address is not present in the translation lookaside buffer, further determines whether the page descriptor of the received virtual address is present in the prefetch buffer; updates the translation lookaside buffer with the page descriptor in response to the determination; and performs a translation of the virtual address to a physical address using the page descriptor.
Abstract:
A semiconductor device includes a first processing unit configured to perform a calculation by using data stored in a memory; and a memory path controller configured to communicate with the first processing unit and control the memory for the first processing unit to perform the calculation, wherein the memory path controller includes an address region control unit configured to divide an address space of the memory to include a secure address and a non-secure address and permit the first processing unit to access the secure address or the non-secure address, and a first content firewall unit connected with the address region control unit and configured to prevent the first processing unit from writing secure contents in the non-secure address.
Abstract:
Provided is a method of driving a system-on-chip (SOC). The method includes adding a first transaction to a list, allocating the first transaction to a first slot, determining whether a second transaction is redundant, and adding the second transaction to the list and allocating the second transaction to the first slot when it is determined that the second transaction is redundant. Accordingly, the SOC can increase outstanding capability and enhance performance of a system interconnection.
Abstract:
A page descriptor can be stored in advance in a memory management unit under various conditions so that an address translation overhead can be reduced. The memory management unit comprises an address translation unit that receives a memory access request as a virtual address and translates the virtual address to a physical address. A translation lookaside buffer (TLB) stores page descriptors of a plurality of physical addresses, the address translation unit determining whether a page descriptor corresponding to a received virtual address is present in the translation lookaside buffer. A prefetch buffer stores page descriptors of the plurality of physical addresses. The address translation unit, in the event the page descriptor corresponding to the received virtual address is not present in the translation lookaside buffer, further determines whether the page descriptor corresponding to the received virtual address is present in the prefetch buffer; updates the translation lookaside buffer with the page descriptor corresponding to the received virtual address; and performs a translation of the virtual address to a physical address using the page descriptor corresponding to the received virtual address. The prefetch buffer may include sub-prefetch buffers, and may be updated based on access direction information.
Abstract:
Provided are an interconnect, a bus system with interconnect, and bus system operating method. The bus system includes a master, slaves access by the master, and an interconnect. The interconnect connects the master with the slaves in response to selection bits identified in a master address provided by the master.
Abstract:
According to various examples of the present invention, an electronic device and a gaze tracking method of the electronic device: detect optical signals, which are outputted from a first light-emitting device and a second light-emitting device and reflected from a user's left eye and right eye, by means of a first camera and a second camera corresponding to each of the first light-emitting device and the second light-emitting device; and determine the user's gaze on the basis of the detected optical signals, wherein the first light-emitting device and the second light-emitting device can be positioned so as to correspond to a left-eye display region and a right-eye display region included in a display of the electronic device, respectively, and various other examples are also possible.
Abstract:
A computing system includes a processor that operates a plurality of virtual machines in which a plurality of operating systems are respectively executed. The processor executes a hypervisor that groups the plurality of virtual machines into a normal virtual machine group and a privilege virtual machine group, and that controls hardware accesses requested by the normal virtual machine group and the privilege virtual machine group. The processor executes a normal application in the normal virtual machine group, and executes a secure application in the privilege virtual machine group.