TRANSMITTING DEVICES THAT PROVIDE TRANMISSION SIGNALS HAVING ENLARGED DATA EYES

    公开(公告)号:US20250071009A1

    公开(公告)日:2025-02-27

    申请号:US18945640

    申请日:2024-11-13

    Abstract: Provided is a transmitting device for enlarging the size of a data eye of a transmission signal. The transmitting device includes an output driver including a plurality of driver circuits that drive a plurality of multi-level signals onto an output node, and a logic circuit configured to detect a direction of a pull-up or pull-down operation of each of the plurality of driver circuits by transitions of the plurality of driver control signals and generate pulse signals. The plurality of multi-level signals are driven based on a plurality of driver control signals and pulse signals, respectively, and the logic circuit provides a pulse signal to at least one static driver circuit connected to a driver control signal that does not transition, from among the plurality of driver circuits.

    ZQ CALIBRATION CIRCUIT, OPERATION METHOD OF THE ZQ CALIBRATION CIRCUIT, AND SEMICONDUCTOR MEMORY DEVICE

    公开(公告)号:US20240127871A1

    公开(公告)日:2024-04-18

    申请号:US18235848

    申请日:2023-08-19

    CPC classification number: G11C7/1048 G11C2207/2254

    Abstract: A ZQ calibration circuit included in a semiconductor memory device includes a reference voltage selector configured to output a reference voltage selected from among a first reference voltage and a second reference voltage generated based on a first supply voltage and a second supply voltage, in response to a selection signal, a ZQ engine configured to generate a pull-up code and a pull-down code based on the selected reference voltage, and a loop selector configured to output the selection signal according to whether each of the pull-up code and the pull-down code is toggled. Levels of the first and second reference voltages are different from each other, smaller than a level of the first supply voltage, and greater than a level of the second supply voltage.

    MEMORY DEVICE PERFORMING TIMING SKEW AND OFFSET CALIBRATION

    公开(公告)号:US20250014632A1

    公开(公告)日:2025-01-09

    申请号:US18600736

    申请日:2024-03-10

    Abstract: A memory device includes a data input/output (I/O) pin, an output driver, a multi-level receiver and a calibrator. The output driver is connected to the data I/O pin, and generates an internal input signal based on a first clock signal. The multi-level receiver is connected to the data I/O pin, and includes a plurality of samplers. The plurality of samplers generate a plurality of decision signals by sampling the internal input signal based on a reference voltage and a second clock signal. The calibrator detects and compensates at least one of timing skew and offset associated with the plurality of samplers based on the plurality of decision signals. The internal input signal is a multi-level signal having three or more voltage levels that are different from each other.

    Calibration circuit and semiconductor device including the same

    公开(公告)号:US12033717B2

    公开(公告)日:2024-07-09

    申请号:US17903578

    申请日:2022-09-06

    CPC classification number: G11C7/1048 G11C2207/2254

    Abstract: A calibration circuit includes a first, second and third pull-up units each connected to a first power supply node, and first and second pull-down units each connected to a second power supply node. A first code generator is configured to generate a first code by comparing a voltage of a pad at which the first pull-up unit is connected to an external resistor with a reference voltage, and a second code generator is configured to generate a second code by comparing a voltage of a first intermediate node with the reference voltage and output the second code to the first and second pull-down units. A third code generator is configured to generate a third code by comparing a voltage of a second intermediate node between the second pull-down unit and the third pull-up unit with the reference voltage.

    Transmitting devices that provide transmission signals having enlarged data eyes

    公开(公告)号:US12170589B2

    公开(公告)日:2024-12-17

    申请号:US18327306

    申请日:2023-06-01

    Abstract: Provided is a transmitting device for enlarging the size of a data eye of a transmission signal. The transmitting device includes an output driver including a plurality of driver circuits that drive a plurality of multi-level signals onto an output node, and a logic circuit configured to detect a direction of a pull-up or pull-down operation of each of the plurality of driver circuits by transitions of the plurality of driver control signals and generate pulse signals. The plurality of multi-level signals are driven based on a plurality of driver control signals and pulse signals, respectively, and the logic circuit provides a pulse signal to at least one static driver circuit connected to a driver control signal that does not transition, from among the plurality of driver circuits.

    TRANSMITTER CIRCUIT AND OPERATION METHOD THEREOF

    公开(公告)号:US20230403040A1

    公开(公告)日:2023-12-14

    申请号:US18189521

    申请日:2023-03-24

    CPC classification number: H04B1/0458 H04B7/005 H04B1/0475

    Abstract: In a transmitter circuit, an impedance calibration circuit is configured to generate an impedance code for impedance matching, an encoder is configured to receive the impedance code and to generate a delay compensation signal based on the impedance code. A delay circuit is configured to output delay data that are delayed from input data by a delay value determined based on the delay compensation signal. A feed-forward equalizer is configured to receive the input data and the delay data, and to equalize the input data based on a main coefficient used for the input data and an equalization coefficient used for the delay data to generate transmission data.

    Transmitter circuit and operation method thereof

    公开(公告)号:US12149269B2

    公开(公告)日:2024-11-19

    申请号:US18189521

    申请日:2023-03-24

    Abstract: In a transmitter circuit, an impedance calibration circuit is configured to generate an impedance code for impedance matching, an encoder is configured to receive the impedance code and to generate a delay compensation signal based on the impedance code. A delay circuit is configured to output delay data that are delayed from input data by a delay value determined based on the delay compensation signal. A feed-forward equalizer is configured to receive the input data and the delay data, and to equalize the input data based on a main coefficient used for the input data and an equalization coefficient used for the delay data to generate transmission data.

    TRANSMITTING DEVICES THAT PROVIDE TRANMISSION SIGNALS HAVING ENLARGED DATA EYES

    公开(公告)号:US20240073081A1

    公开(公告)日:2024-02-29

    申请号:US18327306

    申请日:2023-06-01

    CPC classification number: H04L27/36

    Abstract: Provided is a transmitting device for enlarging the size of a data eye of a transmission signal. The transmitting device includes an output driver including a plurality of driver circuits that drive a plurality of multi-level signals onto an output node, and a logic circuit configured to detect a direction of a pull-up or pull-down operation of each of the plurality of driver circuits by transitions of the plurality of driver control signals and generate pulse signals. The plurality of multi-level signals are driven based on a plurality of driver control signals and pulse signals, respectively, and the logic circuit provides a pulse signal to at least one static driver circuit connected to a driver control signal that does not transition, from among the plurality of driver circuits.

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