公开(公告)号：US09691769B2

公开(公告)日：2017-06-27

申请号：US14810739

申请日：2015-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongjun Kim ,  Keeshik Park ,  Jungwoo Song ,  Sang-Jun Lee ,  Donggyun Han ,  Jaerok Kahng

IPC: H01L21/02 ,  H01L21/00 ,  H01L27/108 ,  H01L27/11521

CPC classification number: H01L27/10814 ,  H01L27/10817 ,  H01L27/10823 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/11521 ,  H01L27/228

Abstract: A memory device includes a substrate including active areas and isolation areas, trenches in the isolation areas, active patterns in the active areas, the active patterns protruding from the substrate, isolation layers filling the trenches, gate trenches crossing the active patterns and the isolation layers, and gate line stacks filling the gate trenches, a first width of the gate trench in the isolation layer being greater than a second width of the gate trench in the active pattern.

公开(公告)号：US11362141B2

公开(公告)日：2022-06-14

申请号：US16845518

申请日：2020-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehong Ha ,  Jaerok Kahng

IPC: H01L27/24 ,  H01L45/00 ,  G11C13/00

Abstract: A variable resistance memory device includes lower conductive lines on a substrate, upper conductive lines on the lower conductive lines to cross the lower conductive lines, and memory cells between the lower conductive lines and the upper conductive lines. The lower conductive lines are extended in a first direction and are spaced apart from each other in a second direction crossing the first direction. Each of the lower conductive lines include a first line portion extended in the first direction, a second line portion offset from the first line portion in the second direction and extended in the first direction, and a connecting portion connecting the first line portion to the second line portion.

公开(公告)号：US09917161B2

公开(公告)日：2018-03-13

申请号：US15238721

申请日：2016-08-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungwoo Song ,  Jaekyu Lee ,  Jaerok Kahng ,  YongJun Kim

IPC: H01L27/108 ,  H01L29/40 ,  H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L27/22

CPC classification number: H01L29/408 ,  H01L27/10811 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10891 ,  H01L27/228 ,  H01L29/4236 ,  H01L29/66666 ,  H01L29/7827

Abstract: A semiconductor device includes active pillars protruding from a semiconductor substrate and spaced apart from each other in a first direction and a second direction that is perpendicular to the first direction, a word line extending in the first direction between the active pillars, a drain region disposed in an upper portion of each of the active pillars, and a separation pattern provided between the word line and the drain region. A bottom surface of the separation pattern is disposed at a lower level than a bottom surface of the drain region.