Abstract:
A texture processor includes: a texture cache configured to store textures; a controller configured to determine a texture address corresponding to a requested texture among the stored textures and read a texture corresponding to the texture address from the texture cache; a format converter configured to convert a format of the read texture into another format, based on a degree of texture precision required by a graphics processing unit (GPU); and a texture filter configured to perform texture filtering using the read texture having its format converted into the another format.
Abstract:
Provided is a method of managing commands, which includes receiving a frame buffer object (FBO) change command, comparing an FBO designated by the FBO change command with a FBO currently processed by a graphics processing unit (GPU) to determine whether the two FBOs are the same as each other, and managing the FBO change command or a flush command based on a result of the comparison.
Abstract:
A texture cache architecture facilitates access of compressed texture data in non-power of two formats, such as the Adaptive Scalable Texture Compression (ASTC) codec. In one implementation, the texture cache architecture includes a controller, a first buffer, a second buffer, and a texture decompressor. A first buffer stores one or more blocks of compressed texel data fetched, in response to a first request, from a first texture cache, where the one or more blocks of compressed texel data including at least requested texel data. The second buffer stores decompressed one or more blocks of compressed texel data and provides the decompressed requested texel data as output to a second texture cache. The one or more blocks of compressed texel data stored by the first buffer includes second texel data in addition to the requested texel data.
Abstract:
Computing apparatus and methods are provided for performing a tile-based graphics pipeline. The graphics pipeline includes a binning pipeline configured to generate a tile list of objects indicating which tile vertices, primitives, or patches the objects belong to; and a rendering pipeline configured to render an object, per tile, based on the tile list generated in the binning pipeline. Each of the binning pipeline and the rendering pipeline is configured to implement a tessellation pipeline. The graphics pipeline may be configured to operate in an efficiency mode to defer or lower tessellation by performing tessellation in one of the binning and rendering pipelines or by setting a new lower tessellation factor.
Abstract:
A rendering method includes receiving an input including pixel pattern information of a device configured to display a rendered image, generating a pixel pattern of the rendered image using the received input indicating pixel pattern information, and outputting a pixel value of the rendered image into a frame buffer using the generated pixel pattern.
Abstract:
A method of compressing a texture includes receiving a texel block obtained by dividing texels forming a texture into units of blocks of texels, determining a block pattern of the texel block, and compressing the texel block based on the block pattern.
Abstract:
A rendering method includes generating mipmap images of some levels with respect to texture and storing the generated mipmap images in a storage, receiving a request for the texture, calculating a level of a mipmap requested for the texture, determining whether the stored mipmap images include the mipmap image of the calculated level, and performing rendering by using at least one of the stored mipmap images, based on a result of the determining.
Abstract:
A method and corresponding apparatus are configured to generate a mipmap are configured to allocate a mipmap status register of a mipmap level generated with respect to a texture, receive a request for the texture, and calculate a mipmap level with respect to the texture. The method and corresponding apparatus are also configured to determine whether a mipmap of the calculated mipmap level exists using the mipmap status register and outputting a result indicative thereof, and determine whether to generate the mipmap of the mipmap level based on the result.
Abstract:
A texture cache architecture includes a first texture cache to store compressed texel data and a second texture cache to store decompressed texel data. A controller schedules accesses to access texel data from the first or second texture cache. The second texture cache permits decompressed texel data to be reused for more than one texel access request.
Abstract:
An image processing method includes receiving a bitstream comprising a first encoding unit and a second encoding unit; acquiring from the bitstream a reference value for decoding of the first coding unit, a weight value for performing interpolation using the reference value to determine one or more sample values, and an index indicating one of the one or more sample values; decoding the first encoding unit using the index and a result of interpolation performed using the reference value and the weight value; and decoding the second encoding unit from the bitstream using the interpolation result used in the decoding of the first encoding unit.