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    METHOD AND DEVICE OF ACCESSING MEMORY WITH NEAR MEMORY ACCELERATOR
    2.
    发明公开
    METHOD AND DEVICE OF ACCESSING MEMORY WITH NEAR MEMORY ACCELERATOR 审中-公开

    公开(公告)号：US20240311009A1

    公开(公告)日：2024-09-19

    申请号：US18439092

    申请日：2024-02-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Arnab Roy ,  Saptarsi Das ,  Kiran Kolar Chandrasekharan ,  Yeongon CHO

    IPC: G06F3/06

    CPC classification number: G06F3/061 ,  G06F3/0629 ,  G06F3/0673

    Abstract: Disclosed are a method of accessing a memory and an electronic device for performing the method. The electronic device includes a processor, and a memory electrically connected to the processor, wherein the processor may be configured to select a rank including bank groups of the memory, select a bank corresponding to a memory address to be accessed from among banks included in the selected rank, select a row and one or more columns from rows and columns of the selected bank corresponding to the memory address, and generate the memory address to access the memory based on an address mapping scheme according to the selected rank, the selected bank, the selected row, and the selected one or more columns.

    RENDERING METHOD, RENDERING APPARATUS, AND ELECTRONIC APPARATUS
    4.
    发明申请
    RENDERING METHOD, RENDERING APPARATUS, AND ELECTRONIC APPARATUS 审中-公开
    渲染方法，渲染设备和电子设备

    公开(公告)号：US20160125851A1

    公开(公告)日：2016-05-05

    申请号：US14819193

    申请日：2015-08-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seunghun JIN ,  Kwontaek KWON ,  Jeongae PARK ,  Soojung RYU ,  Yeongon CHO

    IPC: G09G5/39 ,  G06T1/60

    Abstract: A rendering method includes receiving an input including pixel pattern information of a device configured to display a rendered image, generating a pixel pattern of the rendered image using the received input indicating pixel pattern information, and outputting a pixel value of the rendered image into a frame buffer using the generated pixel pattern.

    Abstract translation: 一种渲染方法，包括接收包括被配置为显示渲染图像的设备的像素图案信息的输入，使用接收到的输入指示像素图案信息生成渲染图像的像素图案，并将所渲染图像的像素值输出到帧 缓冲区使用生成的像素图案。

    TEXTURE PROCESSING APPARATUS AND METHOD
    7.
    发明申请
    TEXTURE PROCESSING APPARATUS AND METHOD 审中-公开
    纹理加工设备和方法

    公开(公告)号：US20170032543A1

    公开(公告)日：2017-02-02

    申请号：US15098786

    申请日：2016-04-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yeongon CHO ,  Seok KANG ,  Soojung RYU ,  Jeongae PARK ,  Woong SEO ,  Sangheon LEE

    IPC: G06T11/00 ,  G06T1/60 ,  G06T1/20 ,  G06T15/04 ,  G06T15/00

    CPC classification number: G06T11/001 ,  G06T1/20 ,  G06T1/60 ,  G06T15/005 ,  G06T15/04

    Abstract: A texture processor includes: a texture cache configured to store textures; a controller configured to determine a texture address corresponding to a requested texture among the stored textures and read a texture corresponding to the texture address from the texture cache; a format converter configured to convert a format of the read texture into another format, based on a degree of texture precision required by a graphics processing unit (GPU); and a texture filter configured to perform texture filtering using the read texture having its format converted into the another format.

    Abstract translation: 纹理处理器包括：纹理缓存，被配置为存储纹理; 控制器，被配置为确定所存储的纹理中与所请求的纹理相对应的纹理地址，并从纹理高速缓存读取与纹理地址相对应的纹理; 格式转换器，其被配置为基于图形处理单元（GPU）所需的纹理精度来将所读取的纹理的格式转换成另一种格式; 以及纹理滤波器，其被配置为使用其格式转换成另一格式的读取纹理来执行纹理滤波。

    METHOD AND APPARATUS FOR EXECUTING GRAPHICS PIPELINE
    8.
    发明申请
    METHOD AND APPARATUS FOR EXECUTING GRAPHICS PIPELINE 审中-公开

    公开(公告)号：US20170098294A1

    公开(公告)日：2017-04-06

    申请号：US15098638

    申请日：2016-04-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Changmoo KIM ,  Yeongon CHO ,  Soojung RYU ,  Woong SEO

    IPC: G06T1/20 ,  G06T1/60

    CPC classification number: G06T1/20 ,  G06T1/60 ,  G06T15/005 ,  G06T2200/28

    Abstract: A method of executing a graphics pipeline includes calculating, while executing the graphics pipeline on a current frame, a resource for processing properties of an object included in a following frame, determining, based on a result of the calculating, whether to perform a pre-process for the object included in the following frame, performing the pre-processing, when the pre-process is determined to be performed, comprising transforming the properties of the object that are to be processed in a graphics pipeline for the following frame, and executing, when the pre-process is to be performed, the graphics pipeline for the following frame by using the transformed properties of the object.

    METHOD AND PROCESSOR FOR IMPLEMENTING THREAD AND RECORDING MEDIUM THEREOF
    9.
    发明申请
    METHOD AND PROCESSOR FOR IMPLEMENTING THREAD AND RECORDING MEDIUM THEREOF 有权
    用于执行螺纹和记录介质的方法和处理器

    公开(公告)号：US20160335125A1

    公开(公告)日：2016-11-17

    申请号：US15146044

    申请日：2016-05-04

    Applicant: Samsung Electronics Co., Ltd. ,  Korea Advanced Institute of Science and Technology

    Inventor： Minseok LEE ,  John Dongjun KIM ,  Woong SEO ,  Soojung RYU ,  Yeongon CHO

    IPC: G06F9/50

    CPC classification number: G06F9/5038 ,  G06F9/46

    Abstract: A processor and corresponding method are described including cores having a thread set allocated based on a pre-set implementation order, and a controller configured to receive scheduling information determined based on an implementation pattern regarding the allocated thread set from one of the cores and transmit the scheduling information to another of the cores. The one of cores determines the scheduling information according to characteristics of an application when implementation of the thread set is completed. Each of the cores re-determines an implementation order regarding the allocated thread set based on the determined scheduling information.

    Abstract translation: 描述了一种处理器和相应的方法，其包括具有基于预设实现顺序分配的线程集的核心，以及控制器，被配置为接收基于从一个核心分配的线程集合的实现模式确定的调度信息，并发送 将信息调度到另一个核心。 当线程集合的实现完成时，核心之一根据应用的特性确定调度信息。 每个核心基于所确定的调度信息重新确定关于所分配的线程组的实现顺序。

    METHOD AND SYSTEM FOR TRANSCEIVING DATA OVER ON-CHIP NETWORK
    10.
    发明申请
    METHOD AND SYSTEM FOR TRANSCEIVING DATA OVER ON-CHIP NETWORK 审中-公开
    用于在片上网络上收发数据的方法和系统

    公开(公告)号：US20160205042A1

    公开(公告)日：2016-07-14

    申请号：US14950490

    申请日：2015-11-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  Korea Advanced Institute of Science and Technology

    Inventor： Woong SEO ,  Minseok LEE ,  Dongjun KIM ,  Soojung RYU ,  Yeongon CHO

    IPC: H04L12/933 ,  H04L12/761

    CPC classification number: H04L49/102 ,  H04L45/16

    Abstract: A method of transceiving data over an on-chip network includes determining whether a packet is received by a first router among a plurality of first routers constituting a ring network; determining a transmission destination of the packet received by the first router; and transmitting the packet to a second router among a plurality of second routers constituting a bus network connected to the first router in response to the determined transmission destination being located on the bus network connected to the first router.

    Abstract translation: 一种通过片上网络收发数据的方法包括：确定构成环网的多个第一路由器中的第一路由器是否接收到分组; 确定由第一路由器接收的分组的传输目的地; 以及响应于所确定的发送目的地位于连接到所述第一路由器的总线网络上，将构成连接到所述第一路由器的总线网络的多个第二路由器中的所述分组发送到第二路由器。

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