公开(公告)号：US20210043148A1

公开(公告)日：2021-02-11

申请号：US16793466

申请日：2020-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ha Jun LEE ,  Jeong Ah Ahn ,  Ji-Yong Jeong ,  Suk-Yun Woo ,  Young Sub Jin

IPC: G09G3/3291

Abstract: An organic light-emitting diode (OLED) driving characteristic detection circuit is provided. The OLED driving characteristic detection circuit comprising a first current integrator receiving a first current via a first sensing channel and outputting a first sampling voltage based on the first current, a second current integrator receiving a second current via a second sensing channel and outputting a second sampling voltage based on the second current, and a sampling circuit receiving the first and second sampling voltages, followed by storing and holding the first and second sampling voltages, and removing common noise components included in the first and second sampling voltages, a third sampling capacitor and a fourth sampling capacitor which are connected to an output terminal of the second current integrator and store and hold the second sampling voltage, and a plurality of switches which connect first ends of the first sampling capacitor to the fourth sampling capacitor.

公开(公告)号：US11335272B2

公开(公告)日：2022-05-17

申请号：US16793466

申请日：2020-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ha Jun Lee ,  Jeong Ah Ahn ,  Ji-Yong Jeong ,  Suk-Yun Woo ,  Young Sub Jin

IPC: G09G3/3291

Abstract: An organic light-emitting diode (OLED) driving characteristic detection circuit is provided. The OLED driving characteristic detection circuit comprising a first current integrator receiving a first current via a first sensing channel and outputting a first sampling voltage based on the first current, a second current integrator receiving a second current via a second sensing channel and outputting a second sampling voltage based on the second current, and a sampling circuit receiving the first and second sampling voltages, followed by storing and holding the first and second sampling voltages, and removing common noise components included in the first and second sampling voltages, a third sampling capacitor and a fourth sampling capacitor which are connected to an output terminal of the second current integrator and store and hold the second sampling voltage, and a plurality of switches which connect first ends of the first sampling capacitor to the fourth sampling capacitor.

公开(公告)号：US09628034B2

公开(公告)日：2017-04-18

申请号：US14798675

申请日：2015-07-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji-Yong Jeong ,  Jin-Soo Kim ,  Seung-Hwan Baek ,  Ha-Joon Shin

IPC: H03F3/45 ,  H03F3/30

CPC classification number: H03F3/303 ,  G09G2310/0291 ,  G09G2320/0252 ,  G09G2330/021 ,  H03F3/45219 ,  H03F2203/30015 ,  H03F2203/30021 ,  H03F2203/45112 ,  H03F2203/45116 ,  H03F2203/45244 ,  H03F2203/45274 ,  H03F2203/45512

Abstract: An operational amplifying circuit are provided. The operational amplifying circuit includes a control circuit, pull-up and pull-down transistors, first and second bias circuits, and a bias voltage generating circuit. The control circuit includes first and second input terminals, and is configured to change, when an input voltage transitions to a first level, a voltage level of a pull-up node and a pull-down node to a second level different from the first level. The pull-up transistor provides a power supply voltage to the output terminal. The pull-down transistor connects the output terminal to a ground voltage. The first bias circuit provides a first bias current to the control circuit. The bias voltage generating circuit generates a bias voltage when the voltage level of at least one of the pull-up and pull-down nodes reaches a threshold voltage level, and the second bias circuit provides a second bias current to the control circuit.

公开(公告)号：US10410599B2

公开(公告)日：2019-09-10

申请号：US15235576

申请日：2016-08-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ha Joon Shin ,  Jin-Soo Kim ,  Seung Hwan Baek ,  Kyung-Gyu Park ,  Ji-Yong Jeong

IPC: G06F3/14 ,  G09G3/36 ,  G09G3/3275

Abstract: A source driver integrated circuit (IC) for driving a flat panel display is provided. The source driver IC includes a first control logic circuit configured to generate first output signals for driving first source lines arranged in a first region of the flat panel display and a second control logic circuit configured to generate second output signals for driving second source lines arranged in a second region of the flat panel display. A first output delay between two adjacent output signals among the first output signals is different from a second output delay between two adjacent output signals among the second output signals.

公开(公告)号：US09858883B2

公开(公告)日：2018-01-02

申请号：US14733230

申请日：2015-06-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ji-Yong Jeong

IPC: G09G3/36

CPC classification number: G09G3/3685 ,  G09G2310/0248 ,  G09G2310/0289 ,  G09G2320/0252

Abstract: A display apparatus includes a source driver printed circuit board (PCB) to provide a control signal, a panel to receive the control signal for controlling display of an image, a connector between the source driver PCB and the panel, and a source driver integrated circuit (IC) attached to the connector. The source driver IC provides a pixel voltage which corresponds to an output signal. The pixel voltage is output during a first predetermined time and is different from a data voltage corresponding to an input signal.