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公开(公告)号:US20230206975A1
公开(公告)日:2023-06-29
申请号:US17890625
申请日:2022-08-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yongjae LEE , Jihun BYUN
CPC classification number: G11C11/161 , G11C11/1675 , G11C11/1673 , G11C11/1657 , G11C11/1655 , H01L43/02 , H01L43/08 , H01L27/228 , H01L29/82
Abstract: Disclosed is a magnetic memory device comprising write and read word lines that extend in a first direction on a substrate, the write word line and the read word line spaced apart from each other in a second direction and parallel to a bottom surface of the substrate, first source/drain contacts on one side of the write word line and spaced apart from each other in the first direction, second source/drain contacts on one side of the read word line and spaced apart from each other in the first direction, magnetic tunnel junction patterns connected to the second source/drain contacts, and spin-orbit torque lines on the magnetic tunnel junction patterns and connected to the first source/drain contacts. The magnetic tunnel junction patterns are spaced apart from each other in a third direction. The spin-orbit torque lines are spaced apart from each other in the third direction.
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公开(公告)号:US20230114539A1
公开(公告)日:2023-04-13
申请号:US17845274
申请日:2022-06-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yong Jae LEE , Jihun BYUN
Abstract: A variable resistance memory device includes active regions apart from each other, common bit line contacts in the active regions, first active source contacts on first active regions near one edge of each of the common bit line contacts, second active source contacts on second active regions near another edge of each of the common bit line contacts, word lines between the first active source contacts and the common bit line contacts and between the common bit line contacts and the second active source contacts, bit lines on the common bit line contacts, variable resistance layers connected to the second active source contacts, the word lines, and the bit lines, spin-orbit torque (SOT) layers connected to the first active source contacts on the variable resistance layers, the word lines, and the bit lines, source line contacts on the SOT layers, and source lines connected to the source line contacts.
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