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公开(公告)号:US20180315698A1
公开(公告)日:2018-11-01
申请号:US16029030
申请日:2018-07-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: JinGyu Kim , Taehun Kim , JiSun Hong , Byungmoon Bae , Se-Ho You
IPC: H01L23/498 , H01L23/60
CPC classification number: H01L23/49838 , H01L23/293 , H01L23/49816 , H01L23/562 , H01L23/60 , H01L24/13 , H01L24/16 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/1312 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/16237 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/3511
Abstract: A package substrate includes a substrate including a circuit region, a dummy region surrounding the circuit region, and a lower circuit pattern at the dummy region, the circuit region including unit regions arranged in a matrix shape, and solders on the lower circuit pattern, at least one of the solders electrically connected to the lower circuit pattern.
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公开(公告)号:US10256181B2
公开(公告)日:2019-04-09
申请号:US16029030
申请日:2018-07-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: JinGyu Kim , Taehun Kim , JiSun Hong , Byungmoon Bae , Se-Ho You
IPC: H01L23/498 , H01L23/00 , H01L23/60 , H01L23/29
Abstract: A package substrate includes a substrate including a circuit region, a dummy region surrounding the circuit region, and a lower circuit pattern at the dummy region, the circuit region including unit regions arranged in a matrix shape, and solders on the lower circuit pattern, at least one of the solders electrically connected to the lower circuit pattern.
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公开(公告)号:US10032706B2
公开(公告)日:2018-07-24
申请号:US15236868
申请日:2016-08-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: JinGyu Kim , Taehun Kim , JiSun Hong , Byungmoon Bae , Se-Ho You
IPC: H01L23/498 , H01L23/00 , H01L23/60 , H01L23/29
CPC classification number: H01L23/49838 , H01L23/293 , H01L23/49816 , H01L23/562 , H01L23/60 , H01L24/13 , H01L24/16 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/1312 , H01L2224/13139 , H01L2224/13147 , H01L2224/13155 , H01L2224/16237 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/3511
Abstract: A package substrate includes a substrate including a circuit region, a dummy region surrounding the circuit region, and a lower circuit pattern at the dummy region, the circuit region including unit regions arranged in a matrix shape, and solders on the lower circuit pattern, at least one of the solders electrically connected to the lower circuit pattern.
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